최성율교수가 뉴로모픽 칩에 사용되는 시냅스를 멤리스터로 구현하여 지난 2월 10일 동아사이언스(및 23개의 언론)에 보도되었습니다. 해당 연구는 유연 멤리스터 소자의 구동방식을 디지털에서 아날로그 형태로 변환하여 뉴로모픽 칩의 시냅스 활용 가능성에 대하여 탐구한 내용입니다. 이번 연구는 국제 학술지 `Nano Letters`에 2019년 2월 논문으로 게재되었습니다. (Impact factor 2018 : 12.279)
언론보도: ‘KAIST 연구진, 뉴로모픽 칩 시냅스 구현’ (동아사이언스 및 23개 언론사)
KAIST News: ‘최성율 교수, 뉴로모픽 칩의 시냅스 구현’
Article title: Polymer Analog Memristive Synapse with Atomic-Scale Conductive Filament for Flexible Neuromorphic Computing System
A research article authored by Byung Chul Jang (KAIST EE), Sungkyu Kim (Northwestern U), Sang Yoon Yang (KAIST EE), Jihun Park (KAIST EE), Jun-Hwe Cha (KAIST EE), Jungyeop Oh (KAIST EE), Junhwan Choi (KAIST CBE), Sung Gap Im (KAIST CBE), Vinayak P. Dravid (Northwestern U) and Sung-Yool Choi (KAIST EE; Corresponding author) was published in Nano Letters (2019.02)
The AI system leads to several issues such as limited computing power and high power consumption, making it very challenging to apply it to battery-powered mobile electronics with limited battery capacity. High power consumption of current computing hardware in the software-based implementation of artificial neural network (ANN) is mainly due to the von Neumann architecture, which is energy-inefficient for data-intensive tasks. To overcome these issues, hardware-based ANNs known as brain-inspired neuromorphic systems have been in the spotlight because the neuromorphic system can potentially emulate massively parallel networks of the biological brain with minimal energy consumption.
We demonstrate that flexible memristors with polymer switching layer called pV3D3 can be operated as an electronic synapse device featuring analog conductance updates simply by tuning the lateral size of the conducting filament. Reduction of the lateral size of the filament, that is, the formation of atomically thin Cu filament, resulted in the transition of switching behavior of pV3D3 memristors from abrupt to gradual mode. A linear potentiation-depression characteristic was obtained in this device, suggesting that conductance state can be updated effectively in an analog fashion when consecutive pulses are applied. Device-to-system level simulation of the face recognition also showed that the ANN based on pV3D3 memristors having atomically thin filament well classified the face images even when they were damaged.
Figure 1. A Schematic illustration of flexible pV3D3 memristor synapse array. B Analog switching behavior of polymer memristor. (Inset) Device structure of a memristor with the formation of atomically thin Cu filament. C Potentiation-depression characteristics of pV3D3 memristor. D Recognition rate of ANN for the face classification.