Professor Sung-Yool Choi was reported in Dongascience regarding the implementing a synapse of a neuromorphic chip using a memristor

Prof. Sung-Yool Choi was reported in Dongascience, and 23 media, about a synapse of a neuromorphic chip implemented by memristor on February 10th.

In this research, a synaptic device in neuromorphic chips was proposed by changing the switching mechanism of the memristor device from digital to analog behavior.

The study was published in the February 2019 issue of the international journal "Nano Letters." (Impact factor 2018 : 12.279)

Media: ‘KAIST researchers implement neuromorphic chip synapse’

http://dongascience.donga.com/news/view/26734

KIAST News: ‘KAIST Develops Analog Memristive Synapses for Neuromorphic Chips’

https://www.kaist.ac.kr/_prog/_board/?mode=V&no=93101&code=ed_news&site_dvs_cd=en&menu_dvs_cd=0601&list_typ=B&skey=&sval=&smonth=&site_dvs=&GotoPage=2

 

Article title: Polymer Analog Memristive Synapse with Atomic-Scale Conductive Filament for Flexible Neuromorphic Computing System

A research article authored by Byung Chul Jang (KAIST EE), Sungkyu Kim (Northwestern U), Sang Yoon Yang (KAIST EE), Jihun Park (KAIST EE), Jun-Hwe Cha (KAIST EE), Jungyeop Oh (KAIST EE), Junhwan Choi (KAIST CBE), Sung Gap Im (KAIST CBE), Vinayak P. Dravid (Northwestern U) and Sung-Yool Choi (KAIST EE; Corresponding author) was published in Nano Letters (2019.02)

The AI system leads to several issues such as limited computing power and high power consumption, making it very challenging to apply it to battery-powered mobile electronics with limited battery capacity. High power consumption of current computing hardware in the software-based implementation of artificial neural network (ANN) is mainly due to the von Neumann architecture, which is energy-inefficient for data-intensive tasks. To overcome these issues, hardware-based ANNs known as brain-inspired neuromorphic systems have been in the spotlight because the neuromorphic system can potentially emulate massively parallel networks of the biological brain with minimal energy consumption.

We demonstrate that flexible memristors with polymer switching layer called pV3D3 can be operated as an electronic synapse device featuring analog conductance updates simply by tuning the lateral size of the conducting filament. Reduction of the lateral size of the filament, that is, the formation of atomically thin Cu filament, resulted in the transition of switching behavior of pV3D3 memristors from abrupt to gradual mode. A linear potentiation-depression characteristic was obtained in this device, suggesting that conductance state can be updated effectively in an analog fashion when consecutive pulses are applied. Device-to-system level simulation of the face recognition also showed that the ANN based on pV3D3 memristors having atomically thin filament well classified the face images even when they were damaged.

Figure 1. A Schematic illustration of flexible pV3D3 memristor synapse array. B Analog switching behavior of polymer memristor. (Inset) Device structure of a memristor with the formation of atomically thin Cu filament. C Potentiation-depression characteristics of pV3D3 memristor. D Recognition rate of ANN for the face classification.

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