We are delighted to announce that Professor Jimin Kwon has joined the School of Electrical Engineering, effective April 1, 2026.
Professor Kwon is a distinguished scholar specializing in Semiconductor Devices, 3D Integration, Advanced Packaging, and Heterogeneous Integration. His research vision focuses on breaking down technological silos by unifying cross-domain knowledge—ranging from device physics to system architectures—to advance scalable AI hardware through rigorous device-to-system co-optimization.
In his new role, Professor Kwon will lead pioneering research in 3D IC logic/memory/RF integration and chiplet architectures for scalable AI systems. We look forward to his contributions to our academic community and invite you to join us in extending a warm welcome to him.
Professor Jimin Kwon is currently located in his temporary office at Room 1408, Saeneul-dong. Detailed information about his research areas and academic activities can be found on his official website.
► Shortcut to Professor Jimin Kwon’s Website(Click)
Major Field
- Semiconductor Devices and 3D Integration
- Advanced Packaging and Heterogeneous Integration
Educational Background
- Bachelor Degree, 2012: POSTECH, Electrical Engineering
- Master Degree, 2014: POSTECH, Information Technology Convergence Engineering (ITCE)
- Doctoral Degree, 2018: POSTECH, Creative IT Excellence (CITE)
Career & Awards
- Aug. 2022 – Mar. 2026: Assistant Professor, UNIST
- 2026: Early Career Award, KMEPS
- 2019: Chairman’s Prize, POSTECH Alumni Association
Publications
- “Indium tin oxide vertical channel transistors for scaled 4F2 2TOC gain cell memory with etched sidewall cleaning,” IEEE EDL, 2026
- “Active BSCDN benchmark framework with backside-compatible CNFET logic technology,” IEEE IEDM, 2025
- “Back-end-of-line-compatible passivation of sulfur vacancies in MoS2 transistors using electron-withdrawing benzenethiol,” ACS Nano, 2025
Assigned Curricular Plan
- Advanced Packaging Technologies for AI Systems (tentative)
- Advanced VLSI Devices and DTCO (tentative)
- Active RF Devices and Packaging Systems (tentative)
Vision
We break technological silos and unify cross-domain knowledge from device physics to system architectures to advance scalable AI hardware, pursuing 3D integration, memory-centric computing, and physical AI through rigorous device-to-system co-optimization.
Research Plan
- 3D IC logic/memory/RF integration using new device structures and emerging materials via DTCO.
- Advanced packaging technologies and chiplet architectures for scalable AI systems via STCO.
