Cho Byung Jin Cho Byung Jin

Degree

Ph. D (1991) KAIST

Achievement

  • "Synthesis of Monolayer Graphene having Negligible Amount of Wrinkles by Stress Relaxation", Nano Lett., vol. 13, no. 6, pp 2496-2499, May. 2013.
  • "Origin of transient Vth shift after erase and its impact on 2D/3D structure charge trap Flash memory cell operations", , International Electron Devices Meeting (IEDM 2012), pp. 2.4.1 - 2.4.4, San Francisco, USA, December 10-13, 2012. 
  • "Electro-Magnetic Interference (EMI) Shielding Effectiveness of Monolayer Graphene", Nanotechnol., vol. 23, no. 45, pp. 455704-1-455704-5 , Nov. 2012
  • “Direct Measurement of Adhesion Energy of Monolayer Graphene As-Grown on Copper and Its Application to Renewable Transfer Process”, Nano Lett., Feb. 2012. 
  • “Graphene Gate Electrode for MOS Structure-Based Electronic Devices”, Nano Lett., vol. 11, no.12, pp. 5383-5386, Nov. 2011.
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