제목Measurements and Modeling of System-Level ESD-Induced Noises and IC Failures
장소김진국 교수님 (UNIST)
As smart mobile and wearable devices are becoming more widely used, electrostatic discharge (ESD) is increasingly a major electromagnetic compatibility (EMC) problem and results in malfunctions of various electronic devices. It is important to pursue in-depth research on precise measurement and analysis of systemlevel ESD-induced soft failures. The coupling from ESD events can be effectively calculated using the partial element equivalent circuit (PEEC) method both in time and frequency domains. The PEEC method allows a fast and accurate calculation of system-level ESD noise coupling based on the model decomposition process, which separates small victim structures from the large aggressor structures. In addition to prediction of noises, statistical phenomena of the IC logic operation errors at a digital output are measured and analyzed. A simplified structure of a laptop PC and an IC are designed and tested. The input signals to the IC are accurately measured during the ESD tests, and validated with full-wave simulations. The statistical IC soft failures found from the SPICE simulations using the measured input signals are compared with the measured failures, and analyzed. Furthermore, the methods for reduction of ESD-induced IC soft failures are investigated.
Jingook Kim received his B.S., M.S., and Ph.D. degrees in electrical engineering from Korea Advanced Institute of Science and Technology, Daejon, Korea, in 2000, 2002, and 2006, respectively. From 2006 to 2008, he was with DRAM design team in Memory Division of Samsung Electronics, Hwasung, Korea, as a senior engineer. From January 2009 to July 2011, he worked for the EMC Laboratory at the Missouri University of Science and Technology, Missouri, USA, as a postdoc fellow. In July 2011, he joined the Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, where he is currently an associate professor. He has authored or coauthored over 110 journal and conference papers. His current research interests include high-speed I/O circuits design, EMC, ESD, RF interference.