VIA (Vertically Integrated Computer Architecture) Research Group
LaboratoryVIA (Vertically Integrated Computer Architecture) Research Group
DegreePh.D. (2014), University of Texas at Austin
- Youngeun Kwon and Minsoo Rhu, "A Case for Memory-Centric HPC System Architecture for Training Deep Neural Networks," in IEEE Computer Architecture Letters (CAL), vol. 17, no. 2, pp. 134-138, July-Dec. 1 2018.
- Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, and Stephen W. Keckler, "Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks," The 24th IEEE International Symposium on High-Performance Computer Architecture (HPCA-24), Vienna, Austria, Feb. 2018
- Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel Emer, Stephen W. Keckler, and William J. Dally, "SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks," The 44th IEEE/ACM International Symposium on Computer Architecture (ISCA-44), Toronto, ON, Canada, June 2017
- Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, and Stephen W. Keckler, "vDNN: Virtualized Deep Neural Networks for Scalable, Memory-Efficient Neural Network Design," The 49th IEEE/ACM International Symposium on Microarchitecture (MICRO-49), Taipei, Taiwan, Oct. 2016
- Minsoo Rhu, Michael Sullivan, Jingwen Leng and Mattan Erez, "A Locality-Aware Memory Hierarchy for Energy-Efficient GPU Architectures," The 46th IEEE/ACM International Symposium on Microarchitecture (MICRO-46), Davis, CA, Dec. 2013