Professor Sung-Yool Choi’s Research Team Develops 2D Material Based Vertical Tunneling Transistor

Our departments professor Sung-Yool Choi team’s research has been selected as the front cover of the July 13th’s version of ‘Advanced Electronic Materials’. The article is titled "Vertical‐Tunneling Field‐Effect Transistor Based on WSe2‐MoS2 Heterostructure with Ion Gel Dielectric".
The team used a heterostructure of MoS2-WSe2, well known 2D materials, and an ion-gel gate to fabricate a p-type vertical tunneling transistor with an SS-value of 36mW/dec. The developed p-type transistor can be integrated with other n-type transistors and can hopefully lower the computing power for future smart sensor networks, autonomous vehicles and high-speed mobile computing systems.
The article can be seen in the following link.

[Link]
https://onlinelibrary.wiley.com/doi/10.1002/aelm.202070030

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