Specialized Architectures for Machine Learning and Data Analytics

  • 제목
    Specialized Architectures for Machine Learning and Data Analytics
  • 날짜
    2021년 2월 17일(수) 오전 11시
  • 연사
    이재욱 교수(서울대학교) ■ Date / Place : 2021년 2월 17일(수) 오전
  • 장소

■ Abstract : In this talk I will introduce some of my recent work on domain-specific architectures and systems, especially in the domains of machine learning and data analytics. With the end of Moore's Law and Dennard Scaling, specialization of hardware, algorithm and software stack has become the primary source of additional performance, and we start seeing a "Cambrian explosion" of novel computer architectures. With this trend my research group has recently proposed a variety of hardware accelerators and/or specialized software stacks in these domains, some of which I will briefly introduce at the beginning of my talk. And then, I will present in greater depth a couple of case studies of hardware/software co-design---one from machine learning and the other from big data analytics.


■ Bio : Jae W. Lee is an associate professor in the Department of Computer Science and Engineering at Seoul National University (SNU), Korea. His research areas include computer architecture/compilers, parallel programming, and hardware security, and he has co-authored more than 50 research papers in leading CS conferences and journals with over 5,300 citations. His work has been recognized with various awards and honors, including IEEE Symposium on VLSI Circuits Most Frequently Cited Paper Award (2017), ACM ASPLOS Most Influential Paper Award (2014), IEEE Micro "Top Picks" (2020), ACM ASPLOS “Highlights” Paper (2017), HiPEAC Paper Award at ACM PLDI (2012), IEEE PACT Top Paper (2010), and IEEE/ACM MICRO Highest Ranked Paper (2010). Before joining SNU, he was an assistant professor of Semiconductor Systems Engineering at Sungkyunkwan University (SKKU) (2011-2016). Prior to that, he was a research associate at Princeton University, and a researcher and engineer at Parakinetics, Inc., where he conducted research on multicore software optimization. He also contributed to multiple successful VLSI implementation projects, including Physical Uncloneable Function (PUF) and Raw Microprocessor at MIT. He received his B.S. in EE from Seoul National University, M.S. in EE from Stanford University and Ph.D. in CS from MIT. He is a Senior Member of the IEEE and a Member of the ACM.