Cho, Byung Jin

Cho, Byung Jin

Research Group

Device

division

Research Areas

Integrated Circuits & Semiconductor Systems, Semiconductor Devices & Nanotechnology, Display Sciences & Engineering, Photonics

Research

Nano Electronics & Neuromorphic Device

Laboratory

Nanoelectronic and Neuromorphic Device Lab. (NAND)

Building

National Nano Fab Center (E19)

515

Extension

#3485

Email

bjcho@kaist.edu

Website

https://nand.kaist.ac.kr

Degree

Ph. D (1991) KAIST

Achievements

“Synthesis of Monolayer Graphene having Negligible Amount of Wrinkles by Stress Relaxation”, Nano Lett., vol. 13, no. 6, pp 2496-2499, May. 2013.
“Origin of transient Vth shift after erase and its impact on 2D/3D structure charge trap Flash memory cell operations”, , International Electron Devices Meeting (IEDM 2012), pp. 2.4.1 – 2.4.4, San Francisco, USA, December 10-13, 2012.
“Electro-Magnetic Interference (EMI) Shielding Effectiveness of Monolayer Graphene”, Nanotechnol., vol. 23, no. 45, pp. 455704-1-455704-5 , Nov. 2012
“Direct Measurement of Adhesion Energy of Monolayer Graphene As-Grown on Copper and Its Application to Renewable Transfer Process”, Nano Lett., Feb. 2012.
“Graphene Gate Electrode for MOS Structure-Based Electronic Devices”, Nano Lett., vol. 11, no.12, pp. 5383-5386, Nov. 2011.