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Crosstalk becomes increasingly important for high-speed interconnect design when the data rate in serial data communications continues increasing. In this talk, crosstalk for PCB strip lines is re-visited to understand its coupling physics and variations due to manufacturing tolerances. Slight inhomogeneity between the prepreg and core layers and differences in modal conductor losses are found to be the two main mechanisms for far-end crosstalk. The understanding may help the PCB industry to further control the far-end crosstalk through controlling PCB materials in manufacturing. Crosstalk could also occur among the vias or between vias and traces in BGA/connector pin fields. A new pin map design is proposed to cancel the crosstalk due to symmetry. Trace routing optimization is studied to achieve a much lower crosstalk level with orthogonal pin map designs when the S:G ratio is the same or even slightly larger. The crosstalk mitigation techniques introduced in this talk could be used to achieve better signal integrity in high-speed data communications with a data rate of 56 Gb/s and beyond.
Jun Fan (S’97-M’00-SM’06-F’16) received his B.S. and M.S. degrees in Electronic Engineering from Tsinghua University, Beijing, China, in 1994 and 1997, respectively. He received his Ph.D. degree in Electrical Engineering from the University of Missouri-Rolla in 2000. From 2000 to 2007, he worked for NCR Corporation, San Diego, CA, as a Consultant Engineer. In July 2007, he joined the Missouri University of Science and Technology (formerly University of Missouri-Rolla) and is currently the Cynthia Tang Missouri Distinguished Professor in Computer Engineering and Director of the Missouri S&T EMC Laboratory. Dr. Fan also serves as the Director of the National Science Foundation (NSF) Industry/University Cooperative Research Center (I/UCRC) for Electromagnetic Compatibility and Senior Investigator of Missouri S&T Material Research Center. His research interests include signal integrity and EMI designs in high-speed digital systems, dc power-bus modeling, intra-system EMI and RF interference, PCB noise reduction, differential signaling, and cable/connector designs. In the IEEE EMC Society, Dr. Fan served as the Chair of the TC-9 Computational Electromagnetics Committee from 2006 to 2008, the Chair of the Technical Advisory Committee from 2014 to 2016, and a Distinguished Lecturer in 2007 and 2008. He currently is an associate editor for the IEEE Transactions on Electromagnetic Compatibility and IEEE EMC Magazine. Dr. Fan received an IEEE EMC Society Technical Achievement Award in August 2009.
Copyright ⓒ 2015 KAIST Electrical Engineering. All rights reserved. Made by PRESSCAT
Copyright ⓒ 2015 KAIST Electrical Engineering. All rights reserved. Made by PRESSCAT
Copyright ⓒ 2015 KAIST Electrical
Engineering. All rights reserved.
Made by PRESSCAT
