류승탁

Ryu, Seung-Tak

연구디비젼

Circuit

division

주요 연구분야

Multimedia Signal Processing, Security, Integrated Circuits & Semiconductor Systems, RF/mmWave Devices & Systems

주요 연구

Analog/Mixed-mode Integrated Circuit Design

소속연구실

혼성신호집적회로 연구실

위치

전기및전자공학부동 (E3-2)

동 4225 호

연락처

7425

이메일

stryu@kaist.ac.kr

웹사이트

https://msicl.kaist.ac.kr/

학위

Ph.D.(2004) KAIST

대표업적

“An 8.6 ENOB 900MS/s Time-Interleaved 2b/cycle SAR ADC with a 1b/cycle Reconfiguration for Resolution Enhancement”, ISSCC (2013)
“A 6-b 4.1-GS/s Flash ADC with Time-Domain Latch Interpolation in 90-nm CMOS”, JSSC (2013)
“A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design”, TCASII (2013)
“Method and apparatus for digital error correction for binary successive approximation ADC”, US Patent 7986253 (2009)
“Method and apparatus digital error correction of successive approximation analog to digital converter”, KOR Patent 2008-0107657 (2008)