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Routing has been extensively studied as one of key issues in physical design area of the electric design automation from its emergence, and various routing algorithms, tools and systems have been developed and used in practice.
However, research and development of routing is still required since new constraints and objectives forced on routing arise continuously from new technologies.
In this talk, various routing algorithms such as shortest path, spanning tree, Steinear tree, clock tree, routings for packages, for printed circuit boards, for advanced lithography as well as various ideas which are used in these algorithms will be introduced.
Atsushi TAKAHASHI received his B.E., M.E., and D.E. degrees in electrical and electronic engineering from Tokyo Institute of Technology, Tokyo, Japan, in 1989, 1991, and 1996, respectively.
He had been with the Tokyo Institute of Technology as a research associate from 1991 to 1997, and as an associate professor from 1997 to 2009 and from 2012 to 2015, and as a professor from 2015.
He had been with the Osaka University as an associate professor from 2009 to 2012.
He is currently with Department of Information and Communications Engineering, School of Engineering, Tokyo Institute of Technology.
His research interests include electric design automation and combinational algorithms.
He is currently a member of IEEE CASS Board of Governors (BoG), Fundamentals Review Editor-in-Chief of IEICE ESS, Technical Program Chair of ASP-DAC 2018, and others.
He is a member of ACM, and a senior member of IEEE, IEICE, and IPSJ.
Copyright ⓒ 2015 KAIST Electrical Engineering. All rights reserved. Made by PRESSCAT
Copyright ⓒ 2015 KAIST Electrical Engineering. All rights reserved. Made by PRESSCAT
Copyright ⓒ 2015 KAIST Electrical
Engineering. All rights reserved.
Made by PRESSCAT
