Nanoscale resistance switches are two-terminal devices representing at least two programmable resistance states that are retained once programmed. “Nanoscale” indicates the physical demension of a conducting filament that works as a circuit breaker/switch between the two electrodes. Among various classes of resistance switches, my talk mainly addresses valence change memory (VCM) of transistion metal oxides. The VCM effect is based on reversible phase transitions within the insulating mother matrix, which are triggered by point defect dynamics including interfacial electrochemical reactions. From this defect dynamic viewpoint, I first address the mechanism for the VCM effect as well as the electroforming process (initialization process) that breaks the initial symmetry of a pristine switch. Feasible appliations of such switches to deep learning acceleration are the main focus of the second part of my talk. The examples include analog multiply-accumulate (MAC) operation with minimum time complexity using a passive array of binary resistance switches. A new algorithm for ad hoc binary resistance update (fully satisfying a locality constraint) is also introduced. This algorithm features greedy edge-wise training of stochastic neural network with ternary weight values (-1, 0, 1).

In addition, I briefly introduce the recent efforts of my group on the analog and digital neuromorphic system engineering from building blocks to system architecture. This includes a fully reconfigurable digital neuromorphic chip (name Neo²C chip) that is in the pipeline for the moment.