(March 17) Fallacies of Computational Analog

 As new analog techniques have been conceived in the last 30 years, analog designers have come to believe that virtually all analog functions from DC to RF can be integrated even with low power and at low voltage.  Such euphoria of superior analog performance has been mostly fueled by the aggressive device scaling down to the nanometer range.  However, in order to extend analog design capacities based only on the high-speed digital switching, the fundamentals of electronics have been often ignored.

 More often than not, time-domain, simulation-based designs end up with somewhat ambiguous and erroneous results ranging from violating the fundamental energy conservation law to obtaining instantaneous small-signal gain during brief large-signal transient period. They have veered off course with no obvious ends, which require necessary corrections. This talk raises a serious concern about such contemporary analog design practices and commonly overlooked fallacies with 10 examples from DC to RF:  

   1.  Latch with small-signal gain 

   2.  SAR consuming no power 

   3.  Analog integrate-dump and DC wandering 

   4.  Passive mixer and digital RF 

   5.  RF DAC and switching to antenna 

   6.  Inverse class-D PA 

   7.  RF transformer and high-Q PA 

   8.  Switched-capacitor DC-DC with 100% efficiency 

   9.  Single-inductor-multiple-outputs voltage regulator 

  10.  Capacitor-free LDO