Our department’s professor Byung Jin Choi’s research team has developed a key technology for power efficiency of next generation semiconductor devices. The technology can coat a germanium wafer with an insulating film which can minimize current leak loss. Traditional FINFET and GAA fabrications can simultaneously reduce the price and increase the performance but slows down the electron-hole speeds due to small device dimensions. Professor Cho’s team has developed a technology which can overcome these obstacles.
Kihyoen Ahn from the KSIA mentioned that it is a key technology for overcoming the slowing down development of device minituarization.
Professor Cho’s team has been awarded the best paper award at the 26th Korea Semiconductor Conference for the development.
The research was conducted under the Samsung Electronics, SK Hynix, MOTIE supported ‘Future Semiconductor Device Technology Development Project’.
