Professor Shinhyun Choi’s Research Team Develops Novel Semiconductor Device for Next-Generation Neuromorphic Computing/Memory (Published in Nature)
On the 4th, Professor Shinhyun Choi’s research team announced that they have developed an ultra-low power next-generation phase-change memory device that can replace DRAM (Dynamic Random-Access Memory) and NAND flash memory.
☞ Phase Change Memory: A memory device that stores or processes information by changing the resistance state through the use of heat to alter the material between amorphous and crystalline states.
Existing phase change memory devices are manufactured through expensive ultra-fine semiconductor lithography processes, requiring high power consumption. Previous research has focused on reducing the physical size of the device using ultra-fine semiconductor lithography processes to increase the heating effect for memory operation and lower power consumption.
However, this approach achieved only minor improvements in power efficiency and faced practical limitations due to increased process costs and complexity. Professor Choi’s team developed an ultra-low power phase change memory device that electrically forms extremely small nanometer-scale phase change filaments without the need for expensive lithography processes.
This not only significantly reduces process costs but also enables ultra-low power operation, offering a revolutionary advantage.
To address the power consumption issue of phase change memory, Professor Choi’s research team successfully developed an ultra-low power phase change memory device that consumes over 15 times less power than existing devices made through expensive ultra-fine lithography processes. This was achieved by electrically forming the phase change material in an extremely small manner.
EE Ph.D. candidates Park See-On and Hong Seokman participated as the first authors in this study. The research was published in the April issue of the renowned international academic journal `Nature’ on April 4th. (Paper title: Phase-Change Memory via a Phase-Changeable Self-Confined Nano-Filament)
< Figure 1: Diagram of the ultra-low power phase change memory device developed in this study, and a comparison of the power consumption reduction of the ultra-low power phase change memory device to existing phase change memory devices>
This research was supported by the Korea Research Foundation’s Next-Generation Intelligent Semiconductor Technology Development Project, the PIM Artificial Intelligence Semiconductor Core Technology Development (Device) Project, the Excellent Young Researcher Program, and the Nano Medical Device Development Project of the Nano Institute of Technology.
