Professor

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Professor

Professor

Shin, Mincheol

Shin, Mincheol
신민철_.jpg

Research Group

Device

division

Research

Computational Nanotechnology, Nano Device Simulation

Laboratory

Computational Nanotechnology Lab.

Building

School of Electrical Engineering (E3-2)

West Wing 6204

Extension

#7418

Degree
Ph.D.(1992) Northwestern Univ. U.S.A.
Achievement
  • M. Shin, “Multi-gate nanowire FET”, Simulation tool on nanoHUB, DOI:10254/nanohub-r2704, May 2008. http://www.nanohub.org/tools/mgnanowirefet(Accumlated users:340, Jobs:7696) 
  • M. Shin, “Quantum simulations of ballistic nanowire field effect transistors”, Encyclopedia of Complexity and Systems Science in Meyers, Robert(ED), Springer New York, June 2009(Invited Article) 
  • M. Shin, S. Lee and G. Klimeck, “Computational study on the performance of Si nanowire pMOSFETs based on the k.p method”, IEEE Tr. Electron Devices, vol. 57. no. 9, pp. 2274-2283, Sep. 2010. 
  • M. Shin, Y. Park. K.-J. Kong, and H. Chang, “Interface model for HfO2 gate stack from first principles calculations and its application to nanoscale device simulations”, Appl. Phys. Lett., vol. 98, no. 17, pp. 173501-173501-3, Apr. 2011. 
  • Jaehyun Lee and Mincheol Shin, “Simulation Study of Germanium p-type Nanowire Schottky Barrier MOSFETs”, IEEE Electron Device Letters, vol. 34, no. 3, pp. 342-344, March, 2013.