News & Event

Seminar

News & Event

Seminar

(Oct 24) Analytical and Statistical Calculation of Power-Supply-Inducted Jitter and BER in IC-EMC Research

Subject

Analytical and Statistical Calculation of Power-Supply-Inducted Jitter and BER in IC-EMC Research

Date

2017.10.24 (Tue) 11:00-

Speaker

Prof. Jingook Kim (UNIST)

Place

E3-2 B/D, #2216

Overview:

In this talk, analytical closed-form expressions for the transfer functions relating supply voltage fluctuations to IC I/O jitter are introduced.

Also, enhanced statistical link analysis methods for high-speed I/O links considering both supply voltage fluctuations and ISI are proposed and validated by comparison with simulations and experiments.

Profile:

Jingook Kim received his B.S., M.S., and Ph.D. degrees in electrical engineering from Korea Advanced Institute of Science and Technology, Daejon, Korea, in 2000, 2002, and 2006, respectively. From 2006 to 2008, he was with DRAM design team in Memory Division of Samsung Electronics, Hwasung, Korea, as a senior engineer. From January 2009 to July 2011, he worked for the EMC Laboratory at the Missouri University of Science and Technology, Missouri, USA, as a postdoc fellow. In July 2011, he joined the Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, where he is currently an associate professor. He has authored or co-authored over 110 journal and conference papers. His current research interests include high-speed I/O circuits design, EMC, ESD, RF interference.