Monolithic 3D (M3D) integration has emerged as a promising technological solution for traditional transistor scaling limitations and interconnection bottleneck. It allows the reduction of the interconnect delay, resulting in reduction of the power consumption of the chip, not only the area reduction. Moreover, with M3D, many other components such as digital, analog, sensors, display, etc. can be heterogeneously integrated together in a single chip, which can provide enhanced functionality. Heterogeneous integration of different materials combined with M3D is more powerful, because it gives us more process design flexibility, which cannot be obtained in 2D integration (ex. common gate stack process for n-/p-FETs). Furthermore, it naturally has many benefits from their superior physical properties such as high mobility, direct bandgap, etc. Now, the challenge we must overcome is a processing temperature limit for top side devices in order to maitain proper performance of bottom side devices. To solve this problem, we developed a low temperature FET process for III-V materials and low temperature III-V and Ge layer stacking process using wafer bonding and epitaxial lift-off, since these materials can be processed at a low temperature and provide extended opportunity/functionality via heterogeneous integration. In this talk, I will try to give the brief introduction about the field of M3D and my research activity on low temperature process device fabrication and material stacking of III-V and Ge. Finally, I will talk about its applicability to mid-infrared photonics platform, thin film photodiodes, and MicroLED display for creating the ultimate multi-functional 3D chip of the future.
Dr. Sanghyeon Kim received the B.S, M.S., and Ph.D. degress in electronic engineering from The University of Tokyo, Japan in 2009, 2011 and 2014, respectively. After his Ph.D., he joined the Korea Institute of Science and Technology (KIST), Korea in 2014, where he is currently a Staff Senior Researcher with the Center for Opto-Electronic Materials and Devices. He is also with the 3D & Optical I/O team at imec, Belgium as a Post-doc R&D Specialist from July 2017 (on leave, KIST). He has authored and co-authored more than 130 papers in peer-reviewed journal and international conferences including multiple papers in IEDM and VLSI symposia. His current research interests included the Monolithic 3-D integration, next-generation CMOS devices, MicroLED, and MID-IR photonics, etc.