■ Abstract : The deep learning has become an important research problem in both software and hardware architecture. As the performance of deep learning models in various real-world problems far exceeds the other conventional techniques, a number of deep learning models are proposed and widely used. However, the size of deep learning models and/or the training dataset are increasing to achieve state-of-the-art performance. This puts many design challenges for hardware engineers to design energy efficient DNN accelerators either for inference or training. In the first part of this talk, I will present two research works on designing an energy-efficient inference engine: i) a pruning technique called relaxed pruning and its hardware accelerator and ii) evolutionary algorithm to search for an optimal dataflow for the inference engine. For the second part of my talk, I will present a system architecture, called deep partitioned training, that utilizes both near-storage computing and a DNN accelerator for the high-performance training of DNN models.
■ Bio : Jaeha Kung received the B.S. degree in electrical engineering from Korea University, Seoul, South Korea, in 2010, the M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejon, South Korea, in 2012, and the Ph.D. degree in electrical and computer engineering from Georgia Institute of Technology, Atlanta, GA, USA, in 2017. He is currently an Assistant Professor at the Department of Information and Communication Engineering, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea. His current research interests include energy-efficient digital accelerators for deep learning, distributed learning systems, hardware architecture for machine intelligence, and high-performance solver for dynamical systems. He also serves as a Technical Program Committee for IEEE DAC (2021), IEEE/ACM ISLPED (2020), IEEE ISCAS (2019-2021), and IEEE AICAS (2020-2021).