News & Event

Seminar

News & Event

Seminar

Prof.Gain Kim(DGIST),5/17(Tues) 4PM, Bandwidth-efficient modulation and its SerDes design considerations for 200Gb/s/lane and beyond

Subject

Bandwidth-efficient modulation and its SerDes design considerations for 200Gb/s/lane and beyond

Date

2022. 5.17(Tues) 4PM

Speaker

Prof.Gain Kim(DGIST)

Place

E3-2 #2201(우리별세미나실)

Overview:

= Notice =

O Speaker: Prof.Gain Kim(DGIST) (* This seminar will be hosted by Prof. Hyeonmin, Bae.)

O Date: 2022. 5.17(Tues)

O Place : E3-2 #2201(우리별세미나실)

O Start Time: 4PM

O Title: Bandwidth-efficient modulation and its SerDes design considerations for 200Gb/s/lane and beyond

 

-Abstract:

With the increasing data-rate to 112Gb/s per lane, PAM-4 with ADC-based RX has become the most commonly employed modulation for ultra-high-speed serial links.

To keep the data-rate increasing, higher-order modulation techniques exhibiting reduced signal bandwidth have been investigated for multiple reasons, such as reduced attenuation and lower required DAC/ADC conversion rate.

This talk explores bandwidth-efficient modulation techniques for enabling a data-rate of 200Gb/s and beyond in wireline transceivers.

With the particular emphasis on orthogonal frequency division multiplexing (OFDM), this talk covers link modeling with OFDM, design-space exploration, and implementation challenges.

 

 

-Bio:

Gain Kim received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from the Ecole Polytechnique Federal de Lausanne (EPFL), Lausanne, Switzerland in 2013, 2015, and 2018 respectively.

From 2016 to 2018, he was with IBM Research Zurich, working on ADC-based wireline receiver designs.

From 2018 to 2020, he was with KAIST as a postdoctoral fellow, and from Nov. 2020 to Jan. 2022 he was with Samsung Research, Seoul, South Korea, as a staff engineer working on a baseband modem for 6G wireless communications.

In Jan. 2022, he joined Daegu Gyeongbuk Institute of Science & Technology (DGIST), Daegu, South Korea, where he is currently an assistant professor.

His current research interests include the design of high-speed ADC, ultra-high-speed SerDes design, modulation techniques for ADC-based serial links, as well as multi-chip computing systems with energy-efficient interfaces.

Profile:

Copyright ⓒ 2015 KAIST Electrical Engineering. All rights reserved. Made by PRESSCAT

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