In the late-CMOS era, semiconductor and electronics companies face severe product schedule and other competitive pressures. In this context, electronic design automation (EDA) must deliver “design-based equivalent scaling” to help continue essential industry trajectories. A powerful lever for this will be the use of machine learning techniques, both inside and “around” EDA tools. This talk will try to convey some key opportunities and value propositions for machine learning in EDA, supported by concrete existence proofs. Example topics include (1) achieving faster design convergence through new predictors of downstream flow outcomes, (2) removing unnecessary design and modeling margins through new correlation mechanisms, and (3) optimizing the usage of EDA tool licenses and available schedule.
Andrew B. Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing.
He has served as visiting scientist at Cadence (1995-1997) and as founder/CTO at Blaze DFM (2004-2006).
He is a fellow of ACM and IEEE. He has served as general chair of DAC, ISQED, ISPD and other conferences.
He served as international chair/co-chair of the Design technology working group, and of the System Integration focus team, for the International Technology Roadmap for Semiconductors (ITRS) from 2000-2016. His research interests include IC physical design and performance analysis, the IC design-manufacturing interface, combinatorial algorithms and optimization, and the roadmapping of systems and technology.