Self-Powered Artificial Mechanoreceptor Based on Triboelectrification for a Neuromorphic Tactile System

Abstract

A self-powered artificial mechanoreceptor module is demonstrated with a triboelectric nanogenerator (TENG) as a pressure sensor with sustainable energy harvesting and a biristor as a neuron. By mimicking a biological mechanoreceptor, it simultaneously detects the pressure and encodes spike signals to act as an input neuron of a spiking neural network (SNN). A self-powered neuromorphic tactile system composed of artificial mechanoreceptor modules with an energy harvester can greatly reduce the power consumption compared to the conventional tactile system based on von Neumann computing, as the artificial mechanoreceptor module itself does not demand an external energy source and information is transmitted with spikes in a SNN. In addition, the system can detect low pressures near 3 kPa due to the high output range of the TENG. It therefore can be advantageously applied to robotics, prosthetics, and medical and healthcare devices, which demand low energy consumption and low-pressure detection levels. For practical applications of the neuromorphic tactile system, classification of handwritten digits is demonstrated with a software-based simulation. Furthermore, a fully hardware-based breath-monitoring system is implemented using artificial mechanoreceptor modules capable of detecting wind pressure of exhalation in the case of pulmonary respiration and bending pressure in the case of abdominal breathing.

Investigation of Leaky Characteristic in a Single-Transistor-Based Leaky Integrate-and-Fire Neuron

Abstract

Leaky characteristic in a leaky integrate-and-fire (LIF) neuron is important to prevent a permanent effect on a single input stimulus in an artificial neuromorphic system as well as a biological nerve. In a proposed single-transistor-based LIF neuron (1T-neuron), band-to-band tunneling (BTBT) dominates the leaky characteristic. Three methods to control the leaky characteristic of a 1T-neuron are demonstrated in this work: controlling the relative location of the drain junction edge to a gate, tuning the gate voltage ( VG ), and modulating body doping concentration ( Nsub ). The 1T-neuron becomes leakier with a more overlapped drain junction with the gate, decreased VG , and increased Nsub by accelerating the BTBT.

 

Cointegration of single-transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware

Abstract

Cointegration of multistate single-transistor neurons and synapses was demonstrated for highly scalable neuromorphic hardware, using nanoscale complementary metal-oxide semiconductor (CMOS) fabrication. The neurons and synapses were integrated on the same plane with the same process because they have the same structure of a metal-oxide semiconductor field-effect transistor with different functions such as homotype. By virtue of 100% CMOS compatibility, it was also realized to cointegrate the neurons and synapses with additional CMOS circuits. Such cointegration can enhance packing density, reduce chip cost, and simplify fabrication procedures. The multistate single-transistor neuron that can control neuronal inhibition and the firing threshold voltage was achieved for an energy-efficient and reliable neural network. Spatiotemporal neuronal functionalities are demonstrated with fabricated single-transistor neurons and synapses. Image processing for letter pattern recognition and face image recognition is performed using experimental-based neuromorphic simulation.

 

A Vertical Silicon Nanowire Based Single Transistor Neuron with Excitatory, Inhibitory, and Myelination Functions for Highly Scalable Neuromorphic Hardware

Abstract

A single transistor neuron (1T-neuron) is demonstrated by using a vertically protruded nanowire from an 8 in. silicon (Si) wafer. The 1T-neuron adopts a gate-all-around structure to completely surround the Si nanowire (Si-NW) to make a floating body and allow aggressive downscaling. The Si-NW is composed of an n+ drain at the top, n+ source at the bottom, and p-type floating body at the middle, which are self-aligned vertically. Thus, it occupies a small footprint area. The gate controls an excitatory/inhibitory function. In addition, myelination of a biological neuron that changes membrane capacitance is mimicked by an inherently asymmetric source/drain structure. Two spiking frequencies at the same input current are controlled by whether the neuron is myelinated or unmyelinated. Using the vertical 1T-neuron, pattern recognition is demonstrated with both measurements and semiempirical circuit simulations. Furthermore, handwritten numbers in the MNIST database are recognized with accuracy of 93% by software-based simulations. Applicability of the vertical 1T-neuron to various neural networks is verified, including a single-layer perceptron, multilayer perceptron, and spiking neural network.

 

Highly reliable synaptic cell array based on organic-inorganic hybrid bilayer stack toward precise offline learning

저널: Advanced Intelligent Systems

Title: Highly reliable synaptic cell array based on organic-inorganic hybrid bilayer stack toward precise offline learning

Abstract: As the use of artificial intelligence soars, development of novel neuromorphic computing is highly important because of disadvantages of the existing von Neumann architecture. In addition, extensive research on electrochemical metallization (ECM) memristors as synaptic cells have been carried out in pursuit of a linear conductance update for online learning applications. In most cases, however, a conductance distribution change during retention time while updating has not been studied as a major issue, giving less consideration for inference-only computing accelerators based on offline learning. Herein, we suggest organic-inorganic bilayer stacking for synaptic unit cells using poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3) and Al2O3 thin films, showing highly enhanced reliability for offline learning. The bilayer structure achieved better reliability and control of the analog resistive switching and synaptic functions, respectively, through the guided formation of conductive filaments via tip enhanced electric fields. In addition, 5-bit multilevel states achieved long-term stability (> 104 s) following an in-depth study on conductance-level stability. Finally, a device to-system-level simulation was performed by building a CNN based on the hybrid devices. This highlighted the significance of multilevel states in fully connected layers. We believe that our study provides a practical approach to using ECM-based memristors for inference-only neural network accelerators.

 

Bayesian Optimization of MOSFET Devices Using Effective Stopping Condition

제목: Bayesian Optimization of MOSFET Devices Using Effective Stopping Condition

논문지, 연도: IEEE Access, 2021

저자: Bokyeom Kim and Mincheol Shin

초록: Current nanometer-scale metal-oxide-semiconductor field-effect transistor (MOSFET) devices exhibit short-channel, quantum, and self-heating effects, making modeling and analysis very complex. A few recent works have employed machine-learning (ML) techniques and neural networks (NN) to model the complex relationships and optimize devices, but a problem with the NN-based device optimization is that it is data-intensive. Bayesian optimization (BO) can realize ML-based data-efficient optimization of the MOSFET device, as it finds the global optimum while requiring few training data. BO stops theoretically when every candidate is explored, so previous works used a fixed number of iterations for the stopping condition. Such an empirical stopping condition is detrimental to the efficiency and reliability of BO, because the global optimum can be found at an earlier stage or even after stopping. Recently, maximum expected improvement (EI max ) with a tiny constant has been proposed as a stopping condition for BO. However, there have not been sufficient works for improving efficiency of BO. By advancing the EI max scheme, we have systemically investigated the effective stopping condition (ESC) for BO of MOSFET devices to boost the efficiency and reliability of optimization. We found that EI max less than a 1% of unit value was an efficient and reliable ESC for optimization, which resulted in up-to-87.6% and up-to-47% reductions of required training data compared with the fixed iteration method and the tiny constant method, respectively. Our study provides a novel method to boost efficiency and reliability of BOs for the optimization of MOSFET design in the semiconductor industry.

 

Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer

Title: Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer      

Conference/Journal, Year: Science Advances, 2022

Author: Sang Hyun Choi, See-On Park, Seokho Seo, and Shinhyun Choi

Abstract: Conductive-bridging random access memory (CBRAM) has garnered attention as a building block of non–von Neumann architectures because of scalability and parallel processing on the crossbar array. To integrate CBRAM into the back-end-of-line (BEOL) process, amorphous switching materials have been investigated for practical usage. However, both the inherent randomness of filaments and disorders of amorphous material lead to poor reliability. In this study, a highly reliable nanoporous–defective bottom layer (NP–DBL) structure based on amorphous TiO2 is demonstrated (Ag/a-TiO2/a-TiOx/p-Si). The stoichiometries of DBL and the pore size can be manipulated to achieve the analog conductance updates and multilevel conductance by 300 states with 1.3% variation, and 10 levels, respectively. Compared with nonporous TiO2 CBRAM, endurance, retention, and uniformity can be im-proved by 106 pulses, 28 days at 85°C, and 6.7 times, respectively. These results suggest even amorphous-based systems, elaborately tuned structural variables, can help design more reliable CBRAMs.

 

 

Neural Network Physically Unclonable Function: A Trainable Physically Unclonable Function System with Unassailability against Deep Learning Attacks Using Memristor Array

Title: Neural Network Physically Unclonable Function: A Trainable Physically Unclonable Function System with Unassailability against Deep Learning Attacks Using Memristor Array

Conference/Journal, Year: Advanced Intelligent Systems, 2021

Author: Junkyu Park, Yoonji Lee, Hakcheon Jeong, and Shinhyun Choi

Abstract:

The dissemination of edge devices drives new requirements for security primitives for privacy protection and chip authentication. Memristors are promising entropy sources for realizing hardware-based security primitives due to their intrinsic randomness and stochastic properties. With the adoption of memristors among several technologies that meet essential requirements, the neural network physically unclonable function (NNPUF) is proposed, a novel PUF design that takes advantage of deep learning algorithms. The proposed design integrated with the memristor array can be constructed easily because the system does not depend on write operation accuracy. To contemplate a nondifferentiable module during training, an original concept of loss called PUF loss is devised. Iterations of weight update with the loss function bring about optimal NNPUF performance. It is shown that the design achieves a near-ideal 50% average value for security metrics, including uniformity, diffuseness, and uniqueness. This means that the NNPUF satisfies practical quality standards for security primitives by training with PUF loss. It is also demonstrated that the NNPUF response has an unassailable resistance against deep learning-based modeling attacks, which is verified by the near-50% prediction model accuracy.

 

윤준보 교수 연구팀, 상전이 억제된 팔라듐 나노와이어를 이용한 고민감도·고신뢰성 무선 수소 가스센서 개발, 추가 표지 논문 선정

[연구팀사진, KAIST 조민승 박사과정, 윤준보 교수, 부산대 서민호 교수(KAIST 박사졸업), 왼쪽부터]

 

우리 학부 윤준보 교수와 부산대학교 의생명융합공학부 서민호 조교수(KAIST 박사 졸업) 연구팀이 넓은 범위의 수소가스 농도를 무선으로 검출하는 고 민감도 센서 기술을 개발하였습니다. (2022년 ACS Nano 게재, 제1 저자: 조민승 박사과정) 연구팀은 팔라듐 금속을 3차원 나노구조로 설계함으로써 나타날 수 있는 `팔라듐 상전이(phase-transition)* 억제 효과’를 통해 0~4% 농도의 수소가스를 높은 선형성으로 감지하는 무선 가스 센서 기술을 개발하였습니다.

 *상전이(phase transition): 화학, 열역학 및 기타 관련 분야에서 일반적으로 물질의 기본 상태(결정성, 고체, 액체, 기체) 사이의 변화를 뜻한다.

 

 
우리학부 조민승 박사과정이 제 1저자로 참여한 이번 연구는 저명 국제 학술지 ‘ACS Nano’ 2022년 5월 온라인판에 출판됐으며, 추가 표지 논문(Supplementary Cover)으로 선정되었습니다.
(논문명 : Wireless and Linear Hydrogen Detection up to 4% with High Sensitivity through Phase-Transition-Inhibited Pd Nanowires) (https://pubs.acs.org/doi/10.1021/acsnano.2c01783)
 
 
수소가스는 에너지 효율성이 높고 연소 시 물을 생성하는 친환경적인 이점으로 차세대 에너지원으로 주목받고 있습니다. 하지만, 무색, 무취의 수소가스는 4% 이상의 농도에서 낮은 발화에너지로 폭발하는 위험성이 크기 때문에 주의 깊은 사용과 관리가 필요합니다.
 
 
다양한 방식의 수소가스 감지 기술 중, 팔라듐(palladium, Pd) 금속 소재 기반의 기술은 수소와 반응하여 저항이 바뀌는 간단한 원리로 동작할 뿐만 아니라, 상온에서도 수소가스를 선택적으로 감지할 수 있고, 반응 시 부산물이 없어 습도 안정성도 매우 우수하다는 장점이 있습니다. 하지만, 팔라듐은 상온에서 2% 이상의 수소가스에 노출되면, 상 변이(Phase transition)가 일어나면서 1) 센서로서의 농도 범위가 제한*되고, 2) 반응 속도가 지연되며, 3) 내구성이 저해되는 등 다양한 문제를 발생시켜, 최소 4%까지의 농도를 감지해야 하는 수소가스의 기초 요구 조건을 만족시키지 못하고 있습니다.
 
 
연구진은, 스트레스에 의해 화학 퍼텐셜 (Chemical potential)이 감소하고 이로 인해 상전이가 되는 자유에너지를 낮출 수 있음을 처음으로 제안하고, 이를 기반으로 팔라듐 나노구조를 설계·제작하였습니다. 제작된 센서 소자는 0.1~4%의 수소가스를 98.9%의 선형성(linearity)으로 감지하는 성능을 성공적으로 보였습니다. 연구팀은 개발한 소자에 BLE(Bluetooth low energy) 기술과 3D 프린팅 기술, 안드로이드 앱 개발을 통해 무선으로 수소가스를 감지하는 센서 시스템 기술도 시연했는데, 이 기술은 센서와 20 미터(m) 떨어진 상황에서도 스마트폰이나 PC로 수소가스 누출을 안정적으로 감지할 수 있습니다. 이번 결과는 2% 이상 고농도에서 측정이 어려웠던 기존 팔라듐 기반 수소가스 센서의 문제점을 해결할 수 있는 새로운 기술을 개발했다는 점에서 중요한 의미가 있습니다. 특히, 이번 센서 기술은 향후 수소가스를 이용한 청정에너지 시대에 안전관리를 위해서 활발히 활용될 수 있을 것이라고 기대됩니다.
 
 
관련 내용은 28일 전자신문, 뉴스1, 에너지 경제 등 다수의 언론을 통해서도 보도되었습니다.
 
 
[보도 link]
 
 전자신문: https://www.etnews.com/20220628000128 
 뉴스1: https://www.news1.kr/articles/?4725281
 에너지 경제: https://www.ekn.kr/web/view.php?key=20220628010004336
 
[연구성과도 : 개발한 팔라듐(palladium, Pd) 나노구조 기반 수소 센서 모식도와 무선 수소 감지 시스템 데모]

 

김상현교수 연구팀 3차원 집적기술 적용 Micro led 디스플레이 구현 성공

KAIST, 3차원 집적 기술 적용 마이크로 엘이디 (MicroLED) 디스플레이 구현

– 차세대 고해상도 디스플레이 응용 기대

 

[(왼쪽부터) KAIST 전기및전자공학부 김상현 교수, 박주혁 박사과정, 금대명 박사, 백우진 박사과정]

 
KAIST(총장 이광형)는 전기및전자공학부 김상현 교수 연구팀이 *모놀리식 3차원 집적의 장점을 활용한 1600PPI에 상응하는 마이크로 엘이디 디스플레이를 구현하는 데 성공했다고 밝혔다. 
☞ 모놀리식 3차원 집적: 하부 소자 공정 후, 상부의 박막층을 형성하고 상부 소자 공정을 순차적으로 진행함으로써 상하부 소자 간의 정렬도를 극대화할 수 있는 기술로 궁극적 3차원 집적 기술로 불린다.
☞ PPI: Pixel per Inch. 디스플레이에서 1인치에 포함되는 픽셀의 갯수
 
KAIST 전기및전자공학부 박주혁 박사과정과 금대명 박사가 제1저자로 주도하고, 백우진 박사과정과 대만의 Jasper Display의 Johnson Shieh 박사와 협업으로 진행한 이번 연구는 반도체 올림픽이라 불리는 ‘VLSI 기술 & 회로 심포지엄 (2022 IEEE Symposium on VLSI Technology & Circuits)’에서 발표됐다. 
(논문명 : Monolithic 3D sequential integration realizing 1600-PPI red micro-LED display on Si CMOS driver IC)
 
최근 수요가 급격히 증가하고 있는 초고해상도 디스플레이를 구현하기 위한 차세대 디스플레이 소자로써 무기물 기반의 III-V족 화합물 반도체를 활용한 마이크로 엘이디 소자가 핵심 소재 및 부품으로써 주목받고 있다. 마이크로 엘이디는 현재 TV, 모바일 기기에 많이 사용되고 있는 OLED, LCD 디스플레이에 비해 높은 휘도와 명암비, 긴 픽셀 수명 등의 장점이 있어 차세대 디스플레이 소자로써 장점이 뚜렷하다. 
☞ III-V 화합물 반도체: 주기율표 III족 원소와 V족 원소가 화합물을 이루고 있는 반도체로 전하 수송 특성 및 광 특성이 매우 우수한 소재.
 
기존 소자기술의 문제 해결을 위해 디스플레이 구동용 Si CMOS 회로 기판 위에 적색 발광용 LED를 모놀리식 3차원 집적하는 방식을 적용하였다. 웨이퍼상에서 연속적인 반도체 공정 과정을 통해 고해상도 디스플레이 데모에 성공하였다. 이 과정에서 조명용으로 활용되어왔던 무기물 기반 LED 반도체가 아닌 디스플레이용 LED 반도체층을 설계하여 발광을 위한 활성층의 두께를 기존의 1/3로 감소시켜, 픽셀 형성에 필요한 식각 공정의 난도를 크게 낮추어 본 연구성과를 얻어내었다. 또한, 연구팀은 하부 디스플레이 구동 회로의 성능 저하 방지를 위해 350oC 이하에서 상부 III-V 소자를 집적하는 웨이퍼 본딩 등의 초저온 공정을 활용해 상부 소자 집적 후에도 하부 Driver IC의 성능을 그대로 유지할 수 있었다.

본 연구결과는 적색 마이크로 엘이디를 3차원 적층 방식으로 집적하여 세계적인 수준의 해상도인 1600 PPI 구현에 성공한 연구로써 본 연구에서 활용된 모놀리식 3차원 집적에 관한 연구 결과는 차세대 초고해상도 디스플레이 구현을 위한 좋은 가이드로써 활용될 것으로 예상된다.

 
 
□ 그림 설명
 
 그림 1. 이번 연구에서 제작한 Si CMOS 기판상 적색 발광 다이오드 단면 주사현미경 이미지.
 

그림 2. 모놀리식 3차원 적층형 마이크로 디스플레이의 구동 이미지.