< (Top left) Miryeong Kwon, Junhyeok Jang, and Sangwon Lee (Panmnesia Co., Ltd.) (bottom left) Professor Myoungsoo Jung, Seungkwan Kang, and Seungjun Lee.>
EE Professor Myoungsoo Jung’s research team has developed, for the first time, an AI semiconductor technology that can accelerate end-to-end inference for graph neural network-based machine learning.
Graphs are data structures composed of vertices and edges, each representing data points and their relationships. Graph-based neural networks, or Graph Neural Networks (GNNs), can learn complex relationships in real-world data, making them essential across applications such as recommender systems, social network services (SNS), and knowledge graphs. Despite their higher accuracy, GNN-based services have faced challenges in real-world deployments due to their high latency.
< (Left) Hardware Prototype (Right) AUTO GNN Technology Overview>
The research team found that 70–90% of GNN inference time is due to the graph preprocessing stage, where graph data structures are transformed, rather than the GNN model computation time itself. By analyzing preprocessing operations, the research team further identified the algorithms that conventional GPU architectures struggle to parallelize, and accelerated them using specialized hardware logic. Notably, their design separates a fixed-function hardware “shell” from a reconfigurable hardware “kernel,” enabling the kernel to be reconfigured on-the-fly to match the diverse input graph currently being processed and thus sustain high performance on dynamic scenarios.
To validate AutoGNN, the team built an RTL-based prototype on an FPGA and compared GNN inference performance against a server-grade Intel CPU and a high-end NVIDIA GPU. AutoGNN achieved 9.0× speedup over the CPU and 2.1× over the GPU, while reducing energy consumption by 3.3×. They also verified that, in realistic scenarios where graphs change in real time, the reconfigurable design can consistently maintain high performance.
<Comparison with Prior Work>
This research, along with the paper titled “AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance”, was presented at ‘32nd IEEE International Symposium on High-Performance Computer Architecture (HPCA 2026)’.
The research was supported by the Samsung Future Technology Development Program (삼성미래기술육성사업), and further details are available on the lab website: `https://camelab.org`.
< (From back left) Dr. Juhyuk Park, Hyunsu Kim (Ph.D. student) (KAIST), (From front left) Haoli Bao, Chaeyeon Kim (Master’s students, KAIST), (From circle left) Professor Sanghyeon Kim (KAIST), Professor Dae-Myeong Geum (Inha University) >
From TVs and smartwatches to the recently highlighted VR/AR devices—micro-LED, the core technology of these screens, is a next-generation display where individual LEDs smaller than the thickness of a human hair emit light on their own. While Red, Green, and Blue (RGB) are essential for completing a display, highly quantum efficient red micro-LED technology is known to be the most difficult to implement. Professor Sanghyeon Kim of our department and his joint research team have overcome the limitations of existing technologies. They have developed a red micro-LED display technology that achieves ultra-high resolution while significantly reducing power consumption.
Through this, the research team successfully implemented a 1,700 PPI-level ultra-high-resolution micro-LED display. This technology can provide ‘real-life-like images’ rather than just high-resolution screens for VR/AR devices, offering approximately 3 to 4 times the resolution of current smartphone displays. *PPI (Pixel Per Inch): An index indicating how densely pixels, the smallest dots forming a screen, are arranged.
There were two main challenges in commercializing micro-LEDs. First was the efficiency degradation of red LEDs. Specifically, when implementing ‘red pixels,’ energy leakage occurs as the pixel size decreases, causing efficiency to drop sharply. Second was the limitation of the transfer process. The conventional method of picking and placing millions of microscopic LEDs individually makes ultra-high resolution difficult and leads to high defect rates.
The research team solved these problems simultaneously. First, by applying an AlInP/GaInP ‘double-quantum-well (DQW) structure’, they implemented high-efficiency red micro-LEDs that significantly reduce energy loss even as pixel sizes shrink. Simply put, the quantum well/barrier structure acts as an “energy barrier.” It confines electrons and holes within the quantum well layer, preventing carrier leakage. By adopting quantum wells with higher hole concentration, the research team effectively reduced energy loss as pixel sizes decreased, enabling brighter and more efficient red micro-LEDs
< Improved performance results of red micro-LEDs >
Furthermore, instead of transferring LEDs individually, they applied ‘monolithic three-dimensional (M3D) integration’ technology. This involves stacking the LED layers directly onto the driving circuits. This method has the advantage of reducing alignment errors and defect rates, allowing for the stable production of ultra-high-resolution displays. During this process, the research team also secured low-temperature process technology to prevent damage to the underlying circuits.
< Concept of monolithic 3D integration technology >
This research, led by Dr. Juhyuk Park (KAIST) as the first author and Professor Sanghyeon Kim (KAIST) and Professor Dae-Myeong Geum (Inha University) as corresponding authors, was published in the world-renowned academic journal ‘Nature Electronics’ on January 20.
※ Paper Title: A monolithic three-dimensional integrated red micro-LED display on silicon using AlInP/GaInP epilayers)
The research was conducted in collaboration with Professor Dae-Myeong Geum of Inha University. The team also partnered with QSI (CEO Chung-dae Lee), a compound semiconductor manufacturer, and RAONTECH (CEO Seung-tak Yi), a micro-display and semiconductor SoC design company. This work was supported by the National Research Foundation of Korea (NRF) Basic Research Program (2019) and the Display Strategy Research Laboratory project (currently ongoing). It also received support from the Samsung Science and Technology Foundation (2020–2023).
< (From left) Professor Youngsoo Shin and Ph.D. candidate Shilong Zhang >
Shilong Zhang, Ph.D. Candidate, Professor Youngsoo Shin’s Research Lab (DT Lab), Winner of the First Place Photronics Best Student Presentation Award at SPIE Photomask Technology 2025
Shilong Zhang, a Ph.D. candidate from Professor Youngsoo Shin’s research group (KAIST DT Lab) in the School of Electrical Engineering, has won the First Place Photronics Best Student Presentation Award at SPIE Photomask Technology + EUV Lithography 2025, held from September 22 to 26 in Monterey, California, USA.
SPIE Photomask Technology + EUV Lithography is a premier international symposium where professionals and academics from the semiconductor industry gather to present and discuss the latest advancements in photolithography mask technology. The Photronics Best Student Presentation Award, sponsored by Photronics, Inc., is established to encourage students working in fields related to photomasks and EUV lithography. The first place winner receives a $1,500 prize.
Zhang’s award-winning paper, titled “Integrated Curvilinear OPC and SRAF Optimization through Reinforcement Learning,” proposes a reinforcement learning-based method to co-optimize curvilinear sub-resolution assist features (SRAFs) and curvilinear main patterns for advanced semiconductor lithography. The proposed method reduces maximum vertex placement error (VPE) by 7.6% and maximum process variation band (PVB) width by 23.0% compared to conventional curvilinear OPC with fixed SRAFs, demonstrating significant improvements in both pattern fidelity and process window robustness.
<(From left) Professors Young-Ik Sohn, Joonwoo Bae, and Wanyeong Jung of the School of Electrical Engineering, and Donguk Nam of the Department of Mechanical Engineering>
A group research project from the Quantum Device Lab at the School of Electrical Engineering, KAIST, led by Professor Young-Ik Sohn, has been selected as a new 2025 project under the Quantum Science and Technology Flagship Program. The project is titled “All-Photonic Quantum Repeaters Based on Chip-Scale Fusion Multiplexing and Quantum-Dot-Based Deterministic Linear Cluster States.”
This research aims to develop quantum repeaters, a core enabling system essential for long-distance quantum communication. In particular, it distinguishes itself from conventional approaches by pursuing an all-photonic quantum repeater, which relies exclusively on photonic qubits without employing matter-based qubits such as electron spins. The all-photonic quantum repeater is an emerging research paradigm whose theoretical foundation has only recently been established, and it is gaining significant attention as a key candidate technology for next-generation quantum networks.
The conceptual architecture of an all-photonic quantum repeater consists of repeated units composed of a Repeater Graph State (RGS) node, which generates entangled photons, and a measurement node.
<An overview of the all-photonic quantum repeater. The system is composed of repeated units, each consisting of one Repeater Graph State (RGS) node for entangled photon generation and one measurement node.>
By eliminating matter-based qubits, this novel approach offers a crucial advantage: the potential for large-scale manufacturing using only existing semiconductor fabrication technologies. As a result, the proposed technology is considered to possess strong potential to evolve into an industry-standard quantum repeater platform in the future.
To achieve these ambitious research objectives, an industry–academia consortium has been formed, led by KAIST and joined by domestic component companies Fiberpro and Quad. In addition, an international collaborative research team has been established with Quandela, a world-leading French photonic quantum computing company. The Quandela research team will closely collaborate to apply their state-of-the-art entangled photon generation technology as a key component of the quantum repeater system.
The realization of quantum repeaters requires not only quantum photonic chip technologies, but also system-level operational design, application-specific integrated circuits (ASICs) for high-speed multiplexing, and ultra-low-loss packaging technologies, necessitating highly interdisciplinary research efforts. Accordingly, Professor Joonwoo Bae and Professor Wanyeong Jung from the School of Electrical Engineering, KAIST, along with Professor Donguk Nam from the Department of Mechanical Engineering, are participating as co-investigators, contributing their expertise across these domains.
This project is conducted as part of the Quantum Science and Technology Flagship Program, a national quantum initiative led by the Ministry of Science and ICT of Korea. The program will be carried out over approximately eight years through 2032, with a total budget of KRW 645.4 billion, pursuing mission-oriented research and development across three major areas: quantum computing, quantum communication, and quantum sensing. The KAIST research team has been selected for one of the five core projects in the quantum communication domain and will receive approximately KRW 12.8 billion in research funding.
If the quantum repeater is successfully realized through this research, it is expected to extend current quantum key distribution (QKD) technologies—currently limited to distances of around 100 km—to a global scale, thereby making a decisive contribution toward the realization of the quantum internet.
Professor Myoungsoo Jung of the School of Electrical Engineering has been inducted into the IEEE HPCA Hall of Fame.
HPCA (The International Symposium on High-Performance Computer Architecture) is one of the leading international conferences in computer architecture, focusing on advances in high-performance computing systems. The HPCA Hall of Fame recognizes researchers who have made sustained contributions to the field by publishing eight or more papers at the conference.
Professor Jung was selected for this honor following the publication of his recent paper, “AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance.”
Having previously been inducted into the IEEE/ACM ISCA Hall of Fame in 2025, Professor Jung has now been recognized by the Hall of Fame of two major top-tier conferences in computer architecture.
Professor Jung leads the Computer Architecture and Memory/Storage Systems Laboratory (CAMELab) and has conducted long-term research in interconnect technologies and memory/storage systems. He has authored a total of 145 papers published at major international conferences, including SOSP, OSDI, ISCA, MICRO, ASPLOS, HPCA, ATC, FAST, and SC. In 2022, he founded Panmnesia, a faculty startup developing link solutions to improve the efficiency of AI data centers, contributing to both academic and industrial research. In recognition of his continued contributions to science and technology, he was also selected as the first recipient of the 2026 Korea Science and Technology Award.
Professor Jung’s AutoGNN paper will be presented at HPCA 2026, to be held in Sydney, Australia, from January 31 to February 4.
This Hall of Fame induction reflects the sustained efforts of Professor Jung and his collaborators toward advancing computer system design.
<(From left) Yoon-Tae Lee, President of the KAIST Alumni Association; Professor Byungjin Cho>
Professor Byungjin Cho of the School of Electrical Engineering at KAIST has been selected as the recipient of the “KAIST Proud Alumnus Award” in the Social Contribution category, presented by the KAIST Alumni Association.
The “KAIST Proud Alumnus Award” is presented to alumni who have made outstanding contributions to national and societal development through distinguished achievements in academia, industry, public service, and society at large, thereby enhancing the reputation of KAIST. In order to more broadly recognize the diverse contributions of its alumni, the KAIST Alumni Association expanded and reorganized the award categories this year into six fields: Innovation & Entrepreneurship, Industrial Contribution, Academic Research, Public Innovation, Social Contribution, and Young Alumnus.
Professor Cho was selected as the award recipient in the Social Contribution category in recognition of his long-term dedication to supporting international students and his sustained efforts in building an inclusive campus community, contributing to the internationalization of KAIST and the promotion of a welcoming and inclusive campus culture.
In 2010, Professor Cho co-founded KIC (KAIST International Chapel), an on-campus community for international students, together with foreign students. Since then, he has served as a faculty advisor, holding weekly gatherings without interruption for the past 15 years. KIC supports international students in adapting not only to their academic and research activities but also to campus life and life in Korean society, and Professor Cho has played a central role in leading the community since its establishment.
Professor Cho has focused on addressing issues commonly faced by international students, such as a lack of belonging and cultural or emotional isolation, while providing continuous counseling and support for various challenges encountered in campus life. He has taken on a family-like role for students suffering from homesickness and has provided practical assistance through fundraising and other means to students facing illness, major surgery, or financial hardship. In addition, he has worked closely with students to seek solutions to issues related to conflicts with academic advisors, difficulties adapting to laboratory environments, and post-graduation career planning.
Through these efforts, more than 300 international students have benefited from KIC and Professor Cho’s support. His contributions have been widely recognized as playing a significant role in helping international students successfully settle into life at KAIST and in fostering a strong sense of community. In recognition of these contributions, Professor Cho previously received the Excellence Award in the Social Service category at the KAIST Anniversary Ceremony in 2023.
KAIST President Kwang-Hyung Lee stated, “This year’s award recipients are exemplary KAIST members who have contributed to national and societal development through outstanding achievements,” adding, “The challenges and accomplishments of these distinguished alumni will inspire future generations and help spread KAIST’s values of innovation.”
Yoon-Tae Lee, the 27th President of the KAIST Alumni Association, remarked, “The six award recipients are leading figures who have embodied the values of KAIST across academia, industry, public service, and society,” and added, “The Alumni Association will continue to serve as a bridge to expand the impact of our alumni’s achievements throughout society.”
Meanwhile, the 2026 KAIST Proud Alumnus Award Ceremony was held on January 16, 2026, at the L Tower in Seoul, as part of the KAIST New Year’s Gathering.
< (From Left) Ph.D candidate Minjae Kim, Professor Seunghyup Yoo, Dr. Junho Kim >
Organic light-emitting diodes (OLEDs) are widely used in smartphones and TVs thanks to their excellent color reproduction and thin, flexible planar structure. However, internal light loss has limited further improvements in brightness. KAIST EE researchers have now developed a technology that more than doubles OLED light-emission efficiency while maintaining the flat structure that is a key advantage of OLED displays.
The research team led by Professor Seunghyup Yoo of the School of Electrical Engineering has developed a new near-planar light outcoupling structure* and an OLED design method that can significantly reduce light loss inside OLED devices. * Near-planar light outcoupling structure: a thin structure that keeps the OLED surface almost flat while extracting more of the light generated inside to the outside
OLEDs are composed of multiple layers of ultrathin organic films stacked on top of one another. As light passes through these layers, it is repeatedly reflected or absorbed, often causing more than 80% of the light generated inside the OLED to be lost as heat before it can escape.
To address this issue, light outcoupling structures such as hemispherical lenses or microlens arrays (MLAs) have been used to extract light from OLEDs. However, hemispherical lenses protrude significantly, making it difficult to maintain a flat form factor, while MLAs must cover much larger area than individual pixel sizes to achieve sufficient light extraction. This creates limitations in achieving high efficiency without interference between neighboring pixels.
To increase OLED brightness while preserving a planar structure, the research team proposed a new OLED design strategy that maximizes light extraction within the size of each individual pixel.
Unlike conventional designs that assume OLEDs extend infinitely, this approach takes into account the finite pixel sizes actually used in real displays. As a result, more light can be emitted externally even from pixels of the same size.
In addition, the team developed a new near-planar light outcoupling structure that helps light emerge efficiently in the forward direction without being spread too widely. This structure is very thin—comparable in thickness to existing microlens arrays—yet achieves light extraction efficiency close to that of hemispherical lenses of the same lateral dimension. As a result, it hardly undermines the flat form factors of OLEDs and can be readily applied to flexible OLED displays.
By combining the new OLED design with the near-planar light outcoupling structure, the researchers successfully achieved more than a twofold improvement in light-emission efficiency even in small pixels.
< Quasi-Planar Light Extraction OLED Technology >
This technology enables brighter displays using the same power while maintaining OLED’s flat structure, and is expected to extend battery life and reduce heat generation in mobile devices such as smartphones and tablets. Improvements in display lifespan are also anticipated.
MinJae Kim, the first author of the study, noted, “A small idea that came up during class was developed into real research results through the KAIST Undergraduate Research Program (URP).”
Professor Seunghyup Yoo stated, “Although many light outcoupling structures have been proposed, most were designed for large-area lighting applications, and many were difficult to apply effectively to displays composed of numerous small pixels,” adding, “The near-planar light outcoupling structure proposed in this work was designed with constraints on the size of the light source within each pixel, reducing optical interference between adjacent pixels while maximizing efficiency.” He further emphasized that the approach can be applied not only to OLEDs but also to next-generation display technologies based on materials such as perovskites and quantum dots.
< Schematic Overview and Application Examples of the Proposed Light Extraction Structure >
This research, with MinJae Kim (Department of Materials Science and Engineering, KAIST; currently a Ph.D. student in Materials Science and Engineering at Stanford University) and Junho Kim (School of Electrical Engineering, KAIST; currently a postdoctoral researcher at the University of Cologne, Germany) as co–first authors, was published online on December 29, 2025, in Nature Communications.
This research was supported by the KAIST Undergraduate Research Program (URP), the Mid-Career Researcher Program and the Future Display Strategic Research Lab Program of the National Research Foundation (NRF) of Korea, the Human Resource Development Program of the Korea Institute for Advancement of Technology (KIAT), and the Korea Planning & Evaluation Institute of Industrial Technology (KEIT).
<(Top left, clockwise) Professor Sanghun Jeon, Seungyeop Kim (Ph.D. candidate), Hongrae Cho (Postdoctoral Researcher), Sunjae Park (M.S. student), Taeseung Jung (Ph.D. candidate), Sangho Lee (Ph.D. candidate)>
With the rapid advancement of artificial intelligence (AI), the importance of ultra-low-power semiconductor technologies that integrate sensing, computation, and memory into a single platform is growing. However, conventional architectures suffer from power loss and latency caused by data movement, as well as inherent limitations in memory reliability. Addressing these challenges, researchers from the School of Electrical Engineering have presented core technologies for sensor–compute–memory integrated AI semiconductors, drawing significant attention from the international research community.
Professor Sanghun Jeon’s research team presented a total of six papers at the IEEE International Electron Devices Meeting (IEDM 2025), the world’s most prestigious conference in the field of semiconductor devices, held in San Francisco, USA, from December 8 to 10. Among these, the team’s work was simultaneously selected as a Highlight Paper and a Top Ranked Student Paper.
In particular, this achievement is considered a highly significant academic accomplishment, given that a single research laboratory presented six silicon-based semiconductor device papers at IEEE IEDM, the world’s most prestigious conference in the semiconductor device field, known for its low acceptance rate and rigorous academic and industrial evaluation standards.
Highlight Paper: Monolithically Integrated Photodiode–Spiking Circuit for Neuromorphic Vision with In-Sensor Feature Extraction
Top Ranked Student Paper: A Highly Reliable Ferroelectric NAND Cell with Ultra-thin IGZO Charge Trap Layer; Trap Profile Engineering for Endurance and Retention Improvement
The research on the M3D integrated neuromorphic vision sensor, selected as a highlight paper, is a semiconductor that stacks the human eye and brain within a single chip. Simply put, the sensors that detect light and the circuits that process signals like a brain are made into very thin layers and stacked vertically in one chip, implementing a structure where the process of ‘seeing’ and ‘judging’ occurs simultaneously.
Through this, the research team completed the world’s first “In-Sensor Spiking Convolution” platform, where AI computation technology that “sees and judges at the same time” takes place directly within the camera sensor.
< Figure 1. Summary of research on vertically stacked optical signal-to-spike frequency converter for AI >< Figure 2. Representative diagram of the development of a 2T-2C near-pixel analog computing cell based on oxide thin-film transistors >
Previously, this technology required several stages: capturing an image (sensor), converting it to digital (ADC), storing it in memory (DRAM), and then calculating (CNN). However, this new technology eliminates unnecessary data movement as the calculation happens immediately within the sensor. As a result, it has become possible to implement real-time, ultra-low-power Edge AI with significantly reduced power consumption and dramatically improved response speeds.
Based on this approach, the research team presented six core technologies at the conference covering all layers of AI semiconductors, from input to storage. They simultaneously created neuromorphic semiconductors that operate like the brain using much less electricity while utilizing existing semiconductor processes, along with next-generation memory optimized for AI.
First, on the sensor side, they designed the system so that judgment occurs at the sensor stage rather than having separate components for capturing images and calculating. Consequently, power consumption decreased and response speeds increased compared to the conventional method of taking a photo and sending it to another chip for calculation.
< Figure 3. Schematic diagram of a next-generation biomimetic tactile system using neuromorphic devices >< Figure 4. Representative diagram of NC-NAND development research based on Ultra-thin-Mo and Sub-3.5 nm HZO >
Furthermore, in the field of memory, they implemented a next-generation NAND flash that uses the same materials but operates at lower voltages, lasts longer, and can store data stably even when the power is turned off. Through this, they presented a foundational technology that satisfies the requirements for high-capacity, high-reliability, and low-power memory necessary for AI.
<Figure 5. Representative diagram of next-generation 3D FeNAND memory development research>< Figure 6. Representative diagram of research on charge behavior characterization and quantitative analysis methodology for next-generation FeNAND memory >
Professor Sanghun Jeon, who led the research, stated, “This research is significant in that it demonstrates that the entire hierarchy can be integrated into a single material and process system, moving away from the existing AI semiconductor structure where sensing, computation, and storage were designed separately.” He added, “Moving forward, we plan to expand this into a next-generation AI semiconductor platform that encompasses everything from ultra-low-power Edge AI to large-scale AI memory.”
Meanwhile, this research was conducted with support from basic research projects of the Ministry of Science and ICT and the National Research Foundation of Korea, as well as the Center for Heterogeneous Integration of Extreme-scale & Property Semiconductors (CH³IPS). It was carried out in collaboration with Samsung Electronics, Kyungpook National University, and Hanyang University.
< (from left) Prof. Junmo Kim and Ph.D. candidate Minchan Kwon >
No matter how much data they learn, why do Artificial Intelligence (AI) models often miss the mark on human intent? Conventional “comparison learning,” designed to help AI understand human preferences, has frequently led to confusion rather than clarity. A KAIST research team has now presented a new learning solution that allows AI to accurately learn human preferences even with limited data by assigning it a “private tutor.”
A research team led by Professor Junmo Kim developed “TVKD” (Teacher Value-based Knowledge Distillation), a reinforcement learning framework that significantly improves data efficiency and learning stability while effectively reflecting human preferences.
Existing AI training methods typically rely on collecting massive amounts of “preference comparison” data—simple structures like “A is better than B.” However, this approach requires vast datasets and often causes the AI to become confused in ambiguous situations where the distinction is unclear. To solve this problem, the research team proposed a method in which a ‘Teacher model’ that has first deeply understood human preferences delivers only the core information to a ‘Student model.’ This can be compared to a private tutor who organizes and teaches complex content, and the research team named this ‘Preference Distillation.’
The biggest feature of this technology is that instead of simply imitating ‘good or bad,’ it is designed so that the teacher model learns a ‘Value Function’ that numerically judges how valuable each situation is, and then delivers this to the student model. Through this, the AI can learn by making comprehensive judgments about ‘why this choice is better’ rather than fragmentary comparisons, even in ambiguous situations.
< Conceptual diagram of TVKD: After teaching the human preference dataset to the teacher model, learning proceeds by delivering the teacher’s information and the dataset to the student model >
The core of this technology is twofold. First, by reflecting value judgments that consider the entire context into the student model, learning that understands the overall flow rather than fragmentary answers has become possible. Second, a technique was introduced to adjust learning importance according to the reliability of preference data. Clear data is significantly reflected in learning, while the influence of ambiguous or noisy data is reduced, allowing the AI to learn stably even in realistic environments.
As a result of the research team applying this technology to various AI models and conducting experiments, it showed more accurate and stable performance than methods previously known to have the best performance. In particular, it recorded achievements that stably outperformed existing top technologies in major evaluation indices such as MT-Bench and AlpacaEval.
Professor Junmo Kim said, “In reality, human preference data is not always sufficient or perfect,” and added, “This technology will allow AI to learn consistently even under such constraints, so it will be highly practical in various fields.”
< Performance comparison results for each task of MT-Bench. It can be confirmed that the proposed TVKD framework records generally higher scores than existing methods. >< Visualization results of the Shaping term. The top tokens (converted into words) judged as important by the teacher model within the response are displayed in red, intuitively showing which tokens have a greater influence during the value-based alignment process. >
Ph.D. candidate Minchan Kwon participated as the first author, and the research results were accepted at ‘NeurIPS 2025’, the most prestigious international conference in the field of artificial intelligence. The research was presented at a poster session on December 3, 2025 (US Pacific Time).
※ Paper Title: Preference Distillation via Value based Reinforcement Learning,
Meanwhile, this research was carried out with support from the Information & Communications Technology Planning & Evaluation (IITP) funded by the government (Ministry of Science and ICT) in 2024 (No. RS-2024-00439020, Development of Sustainable Real-time Multimodal Interactive Generative AI, SW Star Lab).
Professor Myoungsoo Jung of our department has been selected as the first recipient of the Korea Science and Technology Award in 2026 (January).
The Korea Science and Technology Award is presented monthly by the Ministry of Science and ICT to one researcher who has made significant contributions to the advancement of science and technology over the past three years. Professor Jung was chosen as the first awardee of 2026.
Professor Jung was recognized for his work on modular AI data center architectures based on link and memory technologies. His research addresses the limitations of fixed compute and memory configurations in large-scale AI systems by enabling flexible disaggregation and composition of resources using the CXL interconnect standard, improving both cost efficiency and operational efficiency.
He also proposed system architectures that integrate accelerator-centric interconnect technologies such as UALink and NVLink, along with high-bandwidth memory (HBM), into the modular AI data center designs. These designs were documented in technical reports and have received broad attention from both academia and industry.
Professor Jung is the founder of Panmnesia, a KAIST faculty startup, and a member of the ISCA Hall of Fame. Recently, he has been leading the development of a PCIe 6.4/CXL 3.2-based fabric switch, with sample chips currently being evaluated by partner organizations.
This award formally recognizes Professor Jung’s research contributions to the development of next-generation AI infrastructure technologies.
< Design of Modular AI Data Center Architectures Based on Link and Memory Technologies >
