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(December 7) Demystifying Signal Integrity in High-Speed Designs


Demystifying Signal Integrity in High-Speed Designs


16:00~17:00, Monday, December 7, 2015


Prof. Ramachandra Achar (Carletion University, Ottawa, Canada)


NanoFab (E19) Geunggangsan Seminar Room (1st floor)


With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. If not considered during the design stage, signal integrity effects can cause failed designs. Since extra iterations in the design cycle are costly, accurate prediction of these effects is a necessity in high-speed designs. Consequently, preserving signal integrity has become one of the most challenging tasks facing designers of modern multifunction and miniature electronic circuits and systems. This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: Issues/modeling/analysis in high-speed designs.


Ramachandra Achar (S’95-M’00-SM’04-FM’13) received the B. Eng. degree in electronics engineering from Bangalore University, India in 1990, M. Eng. degree in micro-electronics from Birla Institute of Technology and Science, Pilani, India in 1992 and the Ph.D. degree from Carleton University in 1998.

Dr. Achar currently is a professor in the department of electronics engineering at Carleton University. Prior to joining Carleton university faculty (2000), he served in various capacities in leading research labs, including T. J. Watson Research Center, IBM, New York (1995), Larsen and Toubro Engineers Ltd., Mysore (1992), Central Electronics Engineering Research Institute, Pilani, India (1992) and Indian Institute of Science, Bangalore, India (1990). His research interests include signal/power integrity analysis, EMC/EMI analysis, circuit simulation, parallel and numerical algorithms, microwave/RF algorithms, modeling/simulation methodologies for sustainable and renewable energy, and mixed-domain analysis.

Dr. Achar has published over 180 peer-reviewed articles in international transactions/conferences, six multimedia books on signal integrity and five chapters in different books. Dr. Achar received several prestigious awards, including Bharat Guarav Award (2014), Carleton university research achievement awards (2010 & 2004), NSERC (Natural Science and Engineering Research Council) doctoral medal (2000), University Medal for the outstanding doctoral work (1998), Strategic Microelectronics Corporation (SMC) Award (1997) and Canadian Microelectronics Corporation (CMC) Award (1996). He was also a co-recipient of the IEEE advanced packaging best transactions paper award (2007) and IEEE T-CPMT best transactions paper award (2013). His students have won numerous best student paper awards in international forums.

Prof. Achar currently serves as the Distinguished Lecturer of IEEE EMC Society, General Chair for HPCPS-2014 (IEEE International Workshop on High-Performance Chip Package and Systems), General Co-Chair of NEMO-2015 (Electromagnetic and Multi-physics based modeling, simulation and optimization for RF, microwave and terahertz applications) and on the executive/steering/technical-program committees of several leading IEEE international conferences, such as EPEPS, EDAPS, SPI, ASP-DAC, ECTC and ISCAS, etc. and in the technical committees, EDMS (TC-12 of CPMT) and CAD (MTT-1). Dr. Achar previously (2011, 2012) served as a Distinguished Lecturer (DLP) of the IEEE Circuits and Systems Society (CASS) and a guest editor of IEEE Transactions on CPMT, for two special issues on “Variability Analysis” and “3D-ICs/Interconnects”. He also served as the General Co-Chair of IEEE international conference on Electrical Performance of Electronic Packages & Systems (EPEPS-2010, 2011) and as International Guest Faculty on the invitation of the Dept. of Information Technology of Govt. of India, under the SMDP-II program. He is a founding faculty member of the Canada-India Center of Excellence, a member of the Canadian standards committee on nanotechnology, chair of the joint chapters of CAS/EDS/SSC societies of the IEEE Ottawa Section, and is a consultant for several leading industries focused on high-frequency circuits, systems and tools. Dr. Achar is a practicing professional engineer of Ontario, a Fellow of Engineers Institute of Canada and IEEE.