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School of Electrical Engineering We thrive
to be the world’s
top IT powerhouse.
We thrive to be the world’s top IT powerhouse.

Our mission is to lead innovations
in information technology, create lasting impact,
and educate next-generation leaders of the world.

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School of Electrical Engineering We thrive
to be the world’s
top IT powerhouse.
We thrive to be the world’s top IT powerhouse.

Our mission is to lead innovations
in information technology, create lasting impact,
and educate next-generation leaders of the world.

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Learn More
School of Electrical Engineering We thrive
to be the world’s
top IT powerhouse.
We thrive to be the world’s top IT powerhouse.

Our mission is to lead innovations
in information technology, create lasting impact,
and educate next-generation leaders of the world.

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  • 6
Learn More
School of Electrical Engineering We thrive
to be the world’s
top IT powerhouse.
We thrive to be the world’s top IT powerhouse.

Our mission is to lead innovations
in information technology, create lasting impact,
and educate next-generation leaders of the world.

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  • 6
Learn More
School of Electrical Engineering We thrive
to be the world’s
top IT powerhouse.
We thrive to be the world’s top IT powerhouse.

Our mission is to lead innovations
in information technology, create lasting impact,
and educate next-generation leaders of the world.

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AI in EE AI and machine learning
are a key thrust
in EE research
AI and machine learning are a key thrust in EE research

AI/machine learning  efforts are already   a big part of   ongoing
research in all 6 divisions - Computer, Communication, Signal,
Wave, Circuit and Device - of KAIST EE 

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Highlights

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Professor Hoirin Kim’s research team wins ‘Best Student Paper Award’ at the International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

<(From left) Certificate of Award, Award ceremony, PhD candidate Kangwook Jang (first author), PhD candidate Sungnyun Kim>
 
The research team of Prof. Hoirin Kim from our school has won the Best Student Paper Award at the IEEE International Conference on Acoustics, Speech, and Signal Processing, one of the top-tier international signal, speech, and acoustics conferences. This honor is only given to the top five papers from academic institutions out of 5,576 submitted papers.
 
The research team, consisting of Kangwook Jang (first author) from the School of Electrical and Electronic Engineering, Sungnyun Kim from the Graduate School of AI, and Professor Hoirin Kim, won the Best Student Paper Award by proposing a new distillation loss function for compressing of speech self-supervised learning (speech SSL) models using the speech temporal relation as a new distillation loss function.
 
Although speech self-supervised learning models perform well on various speech tasks such as speech recognition and speaker verification, it is still not sufficient for practical scenarios, such as on-device application, due to the very large number of parameters. Therefore, there has been a lot of researches on compression to reduce the number of parameters of these models through knowledge distillation (KD). However, most of the current techniques directly match the teacher’s speech representation to the student, which is over-constraint for students with weak model representation.
 
Untitled
<Schematic diagram of the speech temporal relation loss function proposed by Prof. Hoirin Kim’s research team>
 
Prof. Hoirin Kim’s research team has explored various objectives to express the temporal relation between speech frames and proposed a loss function suitable for speech self-supervised learning models. The compressed student model is validated on a total of 10 speech-related tasks, and it performs the best among the models that compressed the parameters by about 30%.
 
This research was supported by the National Research Foundation of Korea grant funded by Korea government.
 
 

 

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Professor Kyeongha Kwon’s Research Team Develops a Bioelectronic System for Monitoring Bladder Function After Surgery Using Electronic Sensors

 

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<(from left) Professor Kyeongha Kwon, Doyun Park (Master’s student), Dr. Jihye Kim from Nothwestern University>
 
 
A bioelectronic system has been developed to safely monitor bladder function without the need for catheter insertion in patients who have undergone cystectomy, making it a topic of interest.

 *A catheter is a thin tube made of rubber or metal that is inserted into the bladder.

The research team led by Professor Kyeongha Kwon from the School of Electrical Engineering at KAIST announced on the 16th that they have developed digital healthcare technology that accurately measures the size and pressure changes of the bladder through joint research with Dr. Jihye Kim from Northwestern University in the United States.

Partial cystectomy* requires a long recovery period, during which the urinary tract’s ability to expel urine externally is intermittently assessed through urodynamic studies** (UDS). However, UDS is not patient-friendly, results can vary among users, and it is limited in its ability to collect continuous data. Furthermore, it can lead to the risk of catheter-associated urinary tract infections and, in high-risk patients, can progress to ascending pyelonephritis. As an appropriate alternative to UDS, there is a need for technology that can continuously and in real-time monitor the condition of the bladder without the insertion of a catheter.
 
  *Partial cystectomy: A surgery that involves cutting out the tumor-bearing part of the bladder and stitching the rest of the bladder back together.

  **Urodynamic studies: Diagnostic tests to assess the overall function of the bladder and urethra to plan treatment.

In response, the research team developed an implantable bladder platform that can wirelessly remotely measure mechanical deformation changes related to bladder filling and emptying. This system uses biodegradable strain sensors to measure the size and pressure changes of the bladder in real-time, and the sensors naturally dissolve and disappear within the body after the recovery period. This eliminates the need for additional surgery to remove the monitoring equipment, reduces the risk of complications, and improves patient comfort and recovery time.

 
 
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<Figure 1. Wireless implantable platform for bladder function monitoring (top), mouse model experimental setup (middle), Baboon experimental setup (bottom)>
 
The team proved through mouse models that this platform could reproduce real-time changes for up to 30 days after implantation. Additionally, through experiments on marmosets, the technology demonstrated consistency in pressure measurements for up to eight weeks compared to traditional UDS. These results suggest that the system can be used as an appropriate alternative to UDS for long-term post-surgical bladder recovery monitoring.

Professor Kyeongha Kwon said, “Through extensive experiments using non-human primates (marmosets), we have demonstrated the efficacy of a device that provides accurate and reliable data on bladder function,” and added, “This can be used to shorten patients’ recovery time and improve overall surgical outcomes.”

The results of this study were published in the ‘Proceedings of the National Academy of Sciences (PNAS)’ on April 2nd. (Article title: A wireless, implantable bioelectronic system for monitoring urinary bladder function following surgical recovery, link: https://www.pnas.org/doi/abs/10.1073/pnas.2400868121?af=R)

This research was conducted with the support of the Basic Research Program, the Regional Innovation Lead Research Center Project, and BK21 funded by the Ministry of Science and ICT and the National Research Foundation of Korea.

 

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Professor Shinhyun Choi’s Research Team Develops Novel Semiconductor Device for Next-Generation Neuromorphic Computing/Memory (Published in Nature)

 

Inline image 2024 04 03 15.57.51.490

<(left) Professor Shinhyun Choi, See-On Park integrated ph.d. candidate, Seokman Hong ph.d. candidate>
 

On the 4th, Professor Shinhyun Choi’s research team announced that they have developed an ultra-low power next-generation phase-change memory device that can replace DRAM (Dynamic Random-Access Memory) and NAND flash memory.

☞ Phase Change Memory: A memory device that stores or processes information by changing the resistance state through the use of heat to alter the material between amorphous and crystalline states.

 

Existing phase change memory devices are manufactured through expensive ultra-fine semiconductor lithography processes, requiring high power consumption. Previous research has focused on reducing the physical size of the device using ultra-fine semiconductor lithography processes to increase the heating effect for memory operation and lower power consumption.

 

However, this approach achieved only minor improvements in power efficiency and faced practical limitations due to increased process costs and complexity. Professor Choi’s team developed an ultra-low power phase change memory device that electrically forms extremely small nanometer-scale phase change filaments without the need for expensive lithography processes.

This not only significantly reduces process costs but also enables ultra-low power operation, offering a revolutionary advantage.

 

To address the power consumption issue of phase change memory, Professor Choi’s research team successfully developed an ultra-low power phase change memory device that consumes over 15 times less power than existing devices made through expensive ultra-fine lithography processes. This was achieved by electrically forming the phase change material in an extremely small manner.

EE Ph.D. candidates Park See-On and Hong Seokman participated as the first authors in this study. The research was published in the April issue of the renowned international academic journal `Nature’ on April 4th. (Paper title: Phase-Change Memory via a Phase-Changeable Self-Confined Nano-Filament)

 

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< Figure 1: Diagram of the ultra-low power phase change memory device developed in this study, and a comparison of the power consumption reduction of the ultra-low power phase change memory device to existing phase change memory devices>

 

This research was supported by the Korea Research Foundation’s Next-Generation Intelligent Semiconductor Technology Development Project, the PIM Artificial Intelligence Semiconductor Core Technology Development (Device) Project, the Excellent Young Researcher Program, and the Nano Medical Device Development Project of the Nano Institute of Technology.

 

Professor Yang-Kyu Choi’s Research Team Solved Computing Challenges with Neuromorphic Neural Networks

 

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<(from left) Professor Yang-Kyu Choi, ph.d. candidate Seong-Yun Yun, Professor Joon-kyu Han from Sogang University (KAIST alumnus)>
 
 
Professor Yang-Kyu Choi’s research team has built a miniature oscillatory neural network using only silicon materials and processes currently used in the semiconductor industry, implementing an edge detection feature and solving the graph coloring problem*.

 

*Graph coloring problem: A term used in graph theory, requiring different colors to be assigned to each vertex of a graph. This is similar to assigning frequencies to broadcasting stations to prevent overlap and the creation of areas with poor reception, and is widely applied in various fields.

 

The research team announced on the 3rd that they have developed a neuromorphic oscillatory neural network that mimics the interactions of biological neurons using silicon varistor components.

 

With the arrival of the big data era, artificial intelligence technology has made significant progress. One of the neuromorphic computing methods, the oscillatory neural network (oscillatory neural network), is an artificial neural network that mimics the interaction of neurons. The oscillatory neural network uses the connection operations of oscillators, which are the basic units, and performs calculations using oscillations rather than the magnitude of signals, thus offering advantages in terms of power consumption.

 
 
images 000075 image1.jpg 12
 
< Figure 1. The oscillatory neural network using varistors and its applications >

 

 

The research team developed the oscillatory neural network using silicon-based oscillators. By connecting two or more silicon oscillators using capacitors, the oscillation signals interact with each other and synchronize over time. The research team implemented edge detection, a feature used in image processing, with the oscillatory neural network and solved one of the challenges, the vertex coloring problem.

 

Furthermore, this research has the advantage of being immediately applicable to mass production from a manufacturing perspective, as it built the oscillatory neural network using only silicon materials and processes currently used in the semiconductor industry, instead of complex circuits or materials and structures with low compatibility with existing semiconductor processes.

 

The research, led by Seong-Yun Yun, a doctoral student, and Professor Joon-Kyu Han from Sogang University, stated, “The developed oscillatory neural network can be used as neuromorphic computing hardware capable of calculating complex computing challenges, and is expected to be useful in resource allocation, new drug development, semiconductor circuit design, and scheduling,” highlighting the significance of the research.

 

The study, co-authored by Seong-Yun Yun and Professor Joon-Kyu Han, was published in ‘Nano Letters’, in its 24th volume, issue 9, on March 2024, and was selected as a supplementary cover article.

 
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Photo Caption: < Figure 2. The image selected as a supplementary cover article for Nano Letters >

(Paper title: A Nanoscale Bistable Resistor for an Oscillatory Neural Network) (https://pubs.acs.org/doi/full/10.1021/acs.nanolett.3c04539). 

This research was conducted with the support of the Korea Research Foundation’s Next-Generation Intelligent Semiconductor Technology Development Project and the National Semiconductor Research Laboratory Support Core Technology Development Project.

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Professor Kyeongha Kwon Appointed as Korea Representative of the IEEE ISSCC TPC

 

Inline image 2024 03 25 11.23.06.169

<Professor Kyeongha Kwon>
 
Prof. Kyeongha Kwon has been appointed as the Korea Representative for the Technical Program Committee (TPC) of the International Solid-State Circuits Conference (ISSCC), organized by the Institute of Electrical and Electronics Engineers (IEEE).
 
Held annually in February in San Francisco, USA, ISSCC is internationally recognized as the leading authority in the semiconductor field, often referred to as the “Semiconductor Olympics.” Since its inception in 1954, the conference has been a gathering point for over 4,000 semiconductor engineers from around the world, who come together to exchange the latest research findings and discuss the future of the semiconductor industry.
 
The selection of papers for presentation and the organization of lectures and discussion programs at the conference are managed by 12 TPCs, composed of researchers from academia and industry across various countries, all recognized for their academic achievements.
 
Currently, there are a total of 23 TPC members active in Korea, including 8 from Samsung Electronics, 1 from SK Hynix, 4 from KAIST, and one each from DGIST, GIST, UNIST, Korea University, Sogang University, Seoul National University, Yonsei University, Ewha Womans University, and POSTECH, with one member representing Sapeon.
 
Prof. Kwon began her activities as a TPC member in 2023 and has been appointed as the country representative this year.
Prof. Kwon will preside over meetings of the TPC members in Korea, press conferences, etc., and will facilitate interactions with country representatives from other nations, contributing to the advancement of semiconductor technology.

 

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Seunghyun Lee from Hacking Lab (Advisor: Insu Yun) Wins 190 million Won Prize at International Hacking Contest ‘Pwn2Own’

 Inline image 2024 03 25 08.45.23.377

<(from left) Professor Insu Yun, Seunghyun Lee student>
 
Seunghyun Lee from Hacking Lab (Advisor: Insu Yun) at KAIST’s EE Department, achieved notable prize at the international hacking contest ‘Pwn2Own,’ held from March 20th to 21st at Toronto, Canada. Seunghyun Lee discovered and successfully exploited two browser vulnerabilities, earning a total prize of $145,000 (approximately 190 million won).
 
During this competition, Seunghyun Lee also achieved a ‘double tap’ by exploiting a vulnerability in both Google Chrome and Microsoft Edge browsers simultaneously.
 
‘Pwn2Own’ is a hacking contest in which big global IT companies such as Google, Microsoft, and Apple participate as partners. It targets actual products that constitute the core of modern computer systems, such as browsers, operating systems, and virtual machines.
This contest not only provides prize money and prestige but also contributes to enhancing user safety/privacy by patching vulnerabilities discovered after the competition.
 
Professor Insu Yun evaluated this award as proof that KAIST’s hacking skill has reached a global level and expressed his expectation for the emergence of many talents who will developinto top researchers and hackers at KAIST in the future.
This achievement, recognized at an international competition, serves as an opportunity to showcase KAIST’s technological prowess and students’ excellence to the world.
 
 
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Inline image 2024 03 21 13.45.19.127

Professor Lee Kayoung’s research team develops Superior Electron Mobility and Electron Saturation Velocity Characteristics of the New Device Compared to Existing Devices

 

Inline image 2024 03 21 13.45.19.127

<(from left) Professor Kayoung Lee, Yongwook Seok ph.d candidate>
 
 
Professor Lee Kayoung’s research team has successfully developed a high-performance 2D semiconductor device that can operate at ultra-high speeds and whose performance improves as the temperature decreases, showing potential for use in high-frequency bands and at extremely low temperatures.

The research team led by Professor Lee Kayoung announced on the 20th that they have developed a high-mobility, ultra-high-speed device based on two-dimensional nano-semiconductor indium selenide (InSe), which surpasses the electron mobility and saturation velocity of silicon by more than two-fold.

*Saturation velocity: Refers to the maximum speed at which electrons or holes can move within a semiconductor material. Saturation velocity is a key indicator for evaluating the electrical properties of a semiconductor, as it determines saturation current and cutoff frequency, among other factors.
**Indium Selenide (InSe): An inorganic compound made of indium and selenium that forms two-dimensional layers with van der Waals bonds.

 
Two-dimensional indium selenide is attracting attention as a next-generation semiconductor material due to its higher electron mobility and current compared to traditional silicon semiconductors and 2D semiconductors. However, indium selenide is vulnerable to oxidation in the air and has lower stability, making the development of high-performance devices challenging.
 
Professor Lee Kayoung’s research team improved the stability and performance of indium selenide by using high-quality two-dimensional hexagonal boron nitride (hBN) as the lower insulating layer and thin indium metal as the upper protective layer to solve this problem.
*Hexagonal Boron Nitride (hBN): Nitrogen and boron form a hexagonal planar structure and have insulating properties.
 
Additionally, by forming a two-dimensional heterojunction* structure without contaminating the core channel layer of indium selenide, they significantly improved the electron mobility and electron saturation velocity. This is the first time that the electron saturation velocity of indium selenide has been systematically analyzed, and the research team was able to determine the mechanism for electron saturation velocity.

*Heterojunction: The interface between two layers or regions of different crystalline semiconductors

 
 
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< Figure 1. Superior Electron Mobility and Electron Saturation Velocity Characteristics of the New Device Compared to Existing Devices >

Leading this research, doctoral candidate Seok Yongwook said, “Through the development of high-performance devices, we were able to confirm the high electron mobility and saturation velocity of the two-dimensional semiconductor indium selenide,” and added, “Research on its application is necessary for actual devices that require ultra-low temperature and high-frequency operation.”
 
Professor Lee Kayoung said, “The high-performance electronic device developed this time is capable of ultra-fast operation, making it possible to operate in the 6G frequency band beyond the 5G band,” and “As the temperature decreases, the performance of the device improves significantly, making it suitable for ultra-low temperature high-frequency operation environments like those needed for quantum computer quantum control ICs (Integrated Circuits).”
 
This research, with doctoral student Seok Yongwook from the Department of Electrical and Electronic Engineering as the lead author, was officially published in the international journal of nanoscience, `ACS Nano (Nano),’ on March 19, 2024, and was also featured as the journal cover article. (Paper title: High-Field Electron Transport and High Saturation Velocity in Multilayer Indium Selenide Transistors)

Meanwhile, this research was conducted with the support of the National Research Foundation of Korea’s Young Researchers Program, Basic Research Program, BK21, KAIST’s C2 (Creative & Challenging) Project, LX Semicon-KAIST Future Technology Center, and the Posco Foundation.

 
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< Figure 2. Cover Image of the ACS Nano Journal >
 
 
 
 
 

 

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