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Ph.D. Candidate Sungjun Ahn(advisor Joonhyuk Kang) won Best Student Paper Award at IEEE BMSB 2023 Conference

 

Ahn Sungjun, a Ph.D. candidate in EE Professor Kang Joonhyuk’s lab, received the Best Student Paper at the IEEE BMSB 2023 Conference in Beijing, China.

The IEEE BMSB (IEEE International Symposium on Broadband Multimedia Systems and Broadcasting) is the largest academic conference in the world specializing in broadcasting technology, organized by the Broadcast Technology Society of IEEE.

 

(from left: Ahn Sungjun, Ph.D. candidae, Professor Kang Joonhyuk)

 

Ahn Sungjun (Paper title: Adaptive Modification of Fading Channel Models for Terrestrial SFN Environments), provides essential channel models for performance analysis of Single Frequency Networks (SFN), which is widely adopted in second-generation terrestrial broadcasting systems.

This study presents a technique that adapts measurement-based channel models to apply them to the receiving environment. This research is expected to have broad applications in the worldwide standardization, technological development, and performance analysis of terrestrial broadcasting and communication systems.

Ahn Sungjun expressed in his acceptance speech, “I will continue to strive for excellent research outcomes through active international collaboration.” We express our gratitude and congratulations to the professor, the awardee, and the research lab.

 

 

 

 

 

 

Songhyeon Kuk, Ph.D student from professor Sanghyeon Kim’s lab, won the Best Student Paper at the 2023 International Memory Workshop (IMW). 

IMW is an international conference dealing with technology development for memory technology.

It is a competitive conference with an acceptance rate of around 30% (29% this year) and was held in Monterey, USA this year.

PhD Candidate Songhyeon Kuk’s paper proposed the idea of using P-channel to reduce the performance degradation of the conventional ferroelectric field effect transistors (FET).

It was suggested that the P-Channel ferroelectric FET could be a candidate for next-generation NAND flash memory with excellent performance, and in recognition of this value, Songhyeon Kuk won the Best student paper award.

In addition, Songhyun Kuk presented a paper on the method of designing ferroelectric FET using next-generation semiconductor processes at the VLSI symposium on Technology and Circuits held last week.

 

[Mr. Gangmin Cho, Dr. Yonghwi Kwon, Dr. Pervaiz Kareem, and Prof. Youngsoo Shin from left]

 

The IEEE Transactions on Semiconductor Manufacturing publishes the latest advances related to the manufacture of microelectronic and photonic components and integrated systems, including photovoltaic devices and micro-electro-mechanical systems.

Among around 100 papers published in 2022 at IEEE TSM, their paper has been selected as one of the three papers for Best Paper Award – Honorable Mention.

Dr. Yonghwi Kwon and Prof. Youngsoo Shin, in particular, were recipients of 2021 BPA from the same journal, i.e. they received BPA in 2021 and BPA – Honorable Mention in 2022, a rare and extraordinary achievement.

 

– Title: 2022 IEEE TSM Best Paper Award – Honorable Mention 

– Paper Title: Integrated Test Pattern Extraction and Generation for Accurate Lithography Modeling

– Authors: Gangmin Cho, Yonghwi Kwon, Pervaiz Kareem, and Youngsoo Shin (Advisor professor)

– Journal: IEEE Transactions on Semiconductor Manufacturing

 

 

In a recent Light Science & Application publication, Sangsik Kim, associate professor of electrical engineering at Korea Advanced Institute of Science and Technology (KAIST), and his students at Texas Tech University demonstrated that an anisotropic leaky wave can achieve zero crosstalk between closely spaced identical waveguides using subwavelength grating (SWG) metamaterials.

This counter-intuitive discovery drastically increases the coupling length of transverse-magnetic (TM) mode, which has historically posed challenges due to its low confinement.

 

This research builds upon their prior studies of SWG metamaterials for reducing optical crosstalk, including control of evanescent wave’s skin-depth [Nat Commun 9, 1893 (2018)] and exceptional coupling in anisotropic guided mode [Optica 7, 881-887 (2020)].

SWGs have recently made significant advances in photonics, enabling various high performance PIC components.

However, integration density challenges remained for the TM mode, which exhibits approximately 100 times larger crosstalk than the transverse-electric (TE) mode, hindering high-density chip integration.

 

“Our group has been exploring SWGs for dense photonic integration, achieving significant improvements.

However, previous approaches were limited to TE polarization only. In a photonic chip, there is another orthogonal polarization TM, which can double the chip capacity and is sometimes more desired than TE, such as in evanescent-field sensing.

TM is more difficult to integrate densely than TE because it is typically less confined with a low width-to-height waveguide aspect ratio,” Kim explained.

 

Initially, the team believed it was impossible to reduce crosstalk using SWGs, as they expected leaky mode to enhance coupling between waveguides.

However, they focused on the potentials of anisotropic perturbation with leaky mode, hypothesizing that cross-cancellation might be achievable.

 

Applying coupled-mode analysis to the modal properties of leaky SWG modes, they uncovered unique anisotropic perturbation with leaky-like mode, resulting in zero crosstalk between closely spaced identical SWG waveguides.

Utilizing Floquet boundary simulations, they designed practically implementable SWG waveguides on a standard silicon-on-insulator (SOI) platform that is readily available in the industry, demonstrating remarkable crosstalk suppression and increased coupling lengths by over two orders of magnitude compared to strip waveguides.

 

This breakthrough also significantly reduces noise levels within PICs, with potential impacts on quantum communication and computing, optical metrology, and biochemical sensing.

The researchers further emphasized the broader implications of their work, noting that this novel coupling mechanism could be extended to other integrated photonics platforms and wavelength regimes across visible, mid-infrared, and terahertz beyond the telecommunication band.

 

This surprising coupling mechanism has expanded the potential for dense photonic integration, defying conventional wisdom and pushing the field’s boundaries.

As research continues, the photonics industry will likely see a shift towards denser, lower-noise, and more efficient PIC technologies.

 

related news:

 

– The development of SSD system semiconductors applied with flash-dedicated on-chip network technology is expected to provide an upper hand advantage in the next-generation high-performance SSD market.

– Reduction in response time by up to 31 times compared to existing systems, and lifespan increase by 23%.

– Expected to contribute to the improvement of various algorithm performances that utilize AI research and big data analysis technology.

 

The importance of data continues to increase as more data is needed for AI training along with the demand for high-performance SSD (Solid State Drive, a storage device using semiconductor memory) products, which are major storage devices for data centers and cloud services.

However, high-performance SSD products have faced the limit of tightly-coupled structures making it difficult to maximize SSD performance. 

 

To address this problem, Professor Kim Dongjun (John Kim)’s research team developed the world’s first SSD system semiconductor structure that not only drastically increases the read/write performance of next-generation SSDs through the development of high-performance modular SSD systems, but also extends the lifespan of SSDs. 

 

Professor Kim Dongjun’s team identified the limitations of the tightly-coupled structure inherent in traditional SSD designs, and proposed a de-coupled structure that maximizes performance by building a flash memory dedicated on-chip network inside the SSD based on on-chip network technology, which is mainly used in non-memory system semiconductor designs like CPUs and GPUs.

 

This technology, dubbed ‘modular SSD,’ allows packet-based data to be freely transmitted within the chip, which reduces the interdependence of SSD’s front-end and back-end designs and allows for independent design and assembly.

*On-chip network refers to the packet-based connection structure for elements inside a chip used in system semiconductor design such as CPUs and GPUs. It is one of the essential design elements for high-performance system semiconductors and becomes increasingly important as the size of the semiconductor chip increases.

 

The modular SSD system structure developed by Professor Kim Dongjun’s team refers to components near the SSD as front-end and those closer to the flash memory as the back-end, based on the internal components of the SSD controller and the flash memory interface. They proposed a de-coupled structure that minimizes performance degradation by newly constructing a flash memory dedicated on-chip network that allows data movement between flash controllers in the back-end.

 

By accelerating some functions of the flash translation layer, which is the core element driving the SSD,they created an opportunity to actively overcome the limitations of flash memory through hardware. 

 

The ‘modular’ SSD structure has an advantage in that the de-coupled structure does not limit the flash translation layer to the characteristics of a particular flash memory and provides the convenience of design that allows independent performance of front-end and back-end designs.

 

Through this, response times were reduced by 31 times compared to existing systems and SSD lifespan was extended by about 23% by applying it to SSD bad block management, according to a research team official.

 

This study, in which Jiho Kim (PhD candidate in the School of EE at KAIST) participated as the first author and Professor Jung Myoungsoo as the co-author, is to be presented at the ’50th IEEE/ACM International Symposium on Computer Architecture (ISCA 2023)’, the most prestigious international academic conference in the field of computer architecture, held in Orlando, Florida, USA, on June 19th. (Paper titled: Decoupled SSD: Rethinking SSD Architecture through Network-based Flash Controllers).

 

Professor Kim Dongjun, who led the research, said, “This research is significant in that it identifies the structural limitations of existing SSDs and applies on-chip network technology centered on system memory semiconductors like CPUs to actively perform necessary tasks with hardware, and is expected to contribute to the next-generation high-performance SSD market.”

He explained the significance of the research, adding that “the de-coupled structure has various uses as it is not limited to performance alone as an SSD structure that operates for lifespan extension.”

 

An official explained that this research carries significance as it was conducted through the collaborative research of two world-class researchers: Professor Jeong Myoungsoo, a prominent researcher in the field of computer system storage devices at KAIST, and Professor Kim Dongjun, a leading figure in the field of computer structure and interconnection networks.

 

 

 

Professor Myung Hyun’s research team ranks first, surpassing MIT and CMU.

 

 

 

M.S. student Beomseok Kwon (Advised by Hoi-Jun Yoo) won the Best Paper Award at the 2023 IEEE International Symposium on Circuits and Systems(ISCAS).

The conference was held in California, U.S. from May 21st to 25th.

ISCAS is an international conference held annually by IEEE. M.S. student Beomseok Kwon has published a paper titled “A 92fps and 2.56mJ/Frame Computing-in-Memory-Based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices”.

Details are as follows. 

– Conference: 2023 IEEE International Symposium on Circuits and Systems (ISCAS)

– Date: May 21-25, 2023

– Award: Best Paper Award

– Authors: Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, and Hoi-Jun Yoo (Advisory Professor)

– Paper Title: A 92fps and 2.56mJ/Frame Computing-in-Memory-Based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices

 

 [Prof. Minsoo Rhu]

 

Prof. Minsoo Rhu has been selected as this year’s recipient of the Google Research Scholar Award presented by Google Headquarters.

The Google Research Scholar Award is a program established in 2021 by Google Headquarters to promote collaboration and long-term partnerships between young researchers studying computer science and related fields at universities around the world and Google.

Prof. Yoo was among a total of 78 young faculty recipients from around the world who have been active in academia for less than seven years, and was one of only four faculty members selected in the systems category to receive this year’s award.

Three professors were selected from universities in Korea, and two of them are from KAIST, including Prof. Minsoo Yoo and Prof. Bumjun Kim of the Graduate School of AI.

 

Prof. Minsoo Yoo received the award for his research titled ‘Co-Designing Hardware/Software Systems for Differentially Private Machine Learning’. Generative AI (GAI) technology based on LLM (Large Language Model), which has recently become popular as ChatGPT, collects and utilizes large amounts of user data to improve the accuracy of AI models to improve the quality of AI services.

However, user privacy is emerging as a serious social problem, as sensitive personal information of users is leaked while being transmitted and stored in data centers, and personal information used for learning is leaked when the model trained based on it is serviced in the inference process.

The “Computer System Research for Privacy-Preserving Machine Learning” project, which is the basis of this award, will research AI semiconductors and software solutions to support AI model training that do not leak personal information or sensitive user data during the training or inference process of AI models, which requires the use of large amounts of data.

For the full list of winners and more information about these awards, please visit the websites below.

https://research.google/outreach/research-scholar-program/recipients/?category=2023

Our department’s Professor Myounsoo Jung’s research team has developed the world’s first AI semiconductor for search engines based on CXL 3.0.

 

Approximate nearest neighbor search (ANNS) is widely used in commercial services such as image search, database, and recommendation systems.

However, in production-level ANNS, there is a challenge of requiring a large amount of memory due to the extensive dataset.

To address this memory pressure issue, modern ANNS techniques leverage lossy compression methods or employ persistent storage for their memory expansion.

However, these approaches often suffer from low accuracy and performance.

 

The research team proposed expanding memory capacity via compute express link (CXL), which is PCIe based open-industry interconnect technology that allows the underlying working memory to be highly scalable and composable at a low cost.

Furthermore, the use of a CXL switch enables connecting multiple memory expanders to a single port, providing greater scalability. However, memory expansion through CXL has the disadvantage of increased memory access time compared to local memory.

 

The research team has developed an AI semiconductor, ‘CXL-ANNS‘, which leverages CXL switch and memory expanders to accommodate high memory pressure that comes from extensive datasets without losing accuracy or performance.

Additionally, by using near data processing and data partitioning based on locality, the performance of CXL-ANNS is improved.

They also compared prototyped CXL-ANNS with the existing solutions for ANNS. Compared to previous research, CXL-ANNS shows 111 times higher performance. Particularly, 92 times higher performance can be achieved compared to Microsoft’s solution that is used in commercial service.

 

This research, along with the paper titled “CXL-ANNS: Software-Hardware Collaborative Memory Disaggregation and Computation for Billion-Scale Approximate Nearest Neighbor Search”, will be presented in July at ‘USENIX Annual Technical Conference, ATC, 2023’.

 

 

 

 

The research was supported by Panmnesia (http://panmnesia.com). More information on this paper can be found at CAMELab website (http://camelab.org).

 

[News Link]

The Korea Economic Daily: https://www.hankyung.com/it/article/202305259204i

The Herald Business: http://news.heraldcorp.com/view.php?ud=20230525000225

ChosunBiz: https://biz.chosun.com/science-chosun/technology/2023/05/25/4UW5LPX3WVARVIS3QBBICPINFM/

etnews: https://www.etnews.com/20230525000092